Page 1 of 13 YOUR NAME________________________________ Department of Electrical Engineering and Computer ScienceMassachusetts Institute of Technology 6.012 Microelectronic Devices and Circuits Final Exam Closed Book: Formula sheet provided; 3 sheets of notes permitted Notes: 1. Unless otherwise indicated, you should assume room temperature and that kT/qis 0.025 V. You should also approximate [(kT/q) ln 10] as 0.06 V. 2. Closed book; formula sheet provided and three sheets (6 pages) of notes permit-ted. 3. All of your answers and any relevant work must appear on these pages. Any ad-ditional paper you hand in will not be graded. You are advised to show as much of your work as possible, and to cross out things you think are wrong, rather than erasing them. 4. Make reasonable approximations and assumptions. State and justify any such as-sumptions and approximations you do make. 5. Be careful to include the correct units with your answers when appropriate. 6. Be certain that you have all thirteen (13) pages of this exam booklet and the eight(8) page formula sheet, and make certain that you write your name at the top of this page in the space provided. 7. An effort has been made to make the various parts of these problems independ-ent of each other so if you have difficulty with one item go on, and come backlater. 8. You may see your graded final exam in Room 13-3058 beginning January 6, 2010. 6.012 Staff Use Only PROBLEM 1 (out of a possible 25) PROBLEM 2 (out of a possible 25) PROBLEM 3 (out of a possible 25) PROBLEM 4 (out of a possible 25) TOTALPage 2 of 13 Problem 1 - (25 points) Three short problems: a) [8 pts] Consider the two bars of p-type Si, NA, = 1017 cm-3 illustrated below. Theyare 40 µm long with ohmic contacts on each end, and are identical except thatin one the minority carrier lifetime, τmin, is 10-5 s, and in the other it is 10-9 s. The electron mobility, µe, is the same, 1,600 cm2/V-s, in both. The bars are illuminated with constant radiation generating ML hole-electron pairs/cm2-s uniformly across the plane at x = 0, i.e. gL(x,t) = MLδ(x). Ohmic Contact -20 µm 20 µm Ohmic Contact x [µm] gL(x) = ML δ(x) 0 -20 µm 20 µm Ohmic Contact x [µm] gL(x) = ML δ(x) 0 p-type Si, NA = 1017 cm-3 µe = 1,600 cm2/V-s, τmin = 10-9 s p-type Si, NA = 1017 cm-3 µe = 1,600 cm2/V-s, τmin = 10-5 s i) What is the minority carrier diffusion length, Lmin, in each sample? Longer lifetime sample (τmin = 10-5 s): Lmin = µm Shorter lifetime sample (τmin = 10-9 s): Lmin = µm ii) On the axes provide, sketch the excess minority carrier populations, n’(x), in each sample for -20 µm ≤ x ≤ 20 µm. Indicate in the spaces provided the ap-proximate functional shape (e.g. sin x, ex, x2, etc.) of the curve, its initial slope at x = 0+, and its values at x = ± 20 µm. τmin = 10-5 s n’(x)n’(x) τmin = 10-9 sPeak value of plot N’pk Peak value of plot N’pk x [µm] x [µm] -20 µm0 20 µm -20 µm0 20 µm Functional shape: Functional shape: n’(±20 µm) = n’(±20 µm) = dn’/dx|x = 0+ = dn’/dx|x = 0+ = Problem 1a continues on the next pagePage 3 of 13 Problem 1a continued iii) In which sample is the value of N’pk larger? Explain your answer. ______ τmin = 10-5 s sample, ______ τmin = 10-9 s sample, ______ They are similar because b) [8 pts] This question concerns the design and operation of CMOS inverters in the sub-threshold region. i) In the space to the right draw the cir -cuit schematic of a standard CMOS inverter indicating the type of each transistor (n-MOS or p-MOS), and labeling the sources, drains, and gates (S,D,G), and the input, output, and supply voltages (vIN, vOUT, and VDD). ii) Designing CMOS to operate in the sub-threshold region makes it possi-ble to make very low power, albeit slow, digital integrated circuits. Which of the options below for designing CMOS to operate in the sub-threshold region is the most effective in lowering the power dissipation per gate? _____ By designing transistors with threshold voltages of larger magnitude, |VT| than are conventionally used along with conventional VDD val-ues. _____ By using smaller supply voltages, VDD, than are conventionally used. _____ By using transistors with much longer gate lengths than convention-ally used so the drain currents are very small. Explain your answer: iii) Write expressions for the drain currents of the transistors in the schematicyou drew in Part b) i) in terms of vIN, vOUT, and VDD assuming they are operat-ing in the sub-threshold region: iD = IST exp(vGS/Vt) [1 – exp(-vDS/Vt)] where Vt ≡ kT/q. iv) Below write the equation you would solve to calculate the transfer character-istic of your sub-threshold CMOS inverter. Problem 1 continues on the next page----Page 4 of 13 Problem 1 continued c) [9 pts] A transimpedance amplifier, which is the subject of this question, is an amplifier that generates a small-signal output voltage proportional to the small-signal input current. It is also called a current-to-voltage converter. Typically this circuit has very low input and output resistance to maximize the current-to-voltage conversion. i) Three single-transistor stages that can be used to build transimpedance am-plifiers are illustrated below. Label each of these stages (i.e., common-base, source-follower, etc.) on the line provided below each schematic. + 1.5 V + 1.5 V + 1.5 V RD iOUT RG1 RD iOUT iIN QiIN iOUT+++ iIN Q+ ++ Q vOUT vOUT vINvIN vOUTvIN RG2 IBIASIBIAS--ii) Use a combination of these single-transistor amplifier stages to design a two-stage amplifier with the lowest possible input resistance and the lowest pos-sible output resistance. Indicate your selection of stages, and draw the sche-matic of your amplifier below. Stage choices: Stage 1: ; Stage 2: + 1.5 V + iin VOUT + vout -iii) Find expressions for the input and output resistances of your amplifier. rin = Ω rout = Ω End of Problem 1Page 5 of 13 Problem 2 (25 points) The p-n diode structure below is illuminated with light generating M hole-electron pairs per cm2-s in the plane at x = 2W, as indicated in the drawing. The in-tensity of the illumination is sufficiently low that all of the classic flow-problem as-sumptions hold: low level injection, quasi-neutrality, negligible minority carrier drift, and
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