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MIT 6 012 - Electrostatics of Metal­-Oxide-­Semiconductor Structure

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6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-1 Lecture 8 - PN Junction and MOS Electrostatics (V) Electrostatics of Metal-Oxide-Semiconductor Structure (cont.) October 4, 2005 Contents: 1. Overview of MOS electrostatics under bias 2. Depletion regime 3. Flatband 4. Accumulation regime 5. Threshold 6. Inversion regime Reading assignment: Howe and Sodini, Ch. 3, §§3.8-3.9 Announcements: Quiz 1: 10/13, 7:30-9:30 PM, open book; must have calculator. (lectures #1-9);6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-2 Key questions • Is there more than one regime of operation of the MOS structure under bias? What does ”carrier inversion” mean and what is the • big deal about it? • How does the carrier inversion charge depend on the gate voltage?6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-3 1. Overview of MOS electrostatics under bias VGB x0-tox "metal"� (n+ polySi) oxide semiconductor� (p type) contactcontact + -Application of bias: • built-in potential across MOS structure increases from φB to φB + VGB oxide forbids current flow • ⇒ – J = 0 everywhere in semiconductor – need drift=-diffusion in SCR • must maintain boundary condition at Si/SiO2 inter-face: Eox/Es � 3 How can this be accommo dat ed simultaneously? ⇒quasi-equilibrium situation with potential build up across MOS equal to φB + VGB6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-4 Important consequence of quasi-equilibrium: ⇒ Boltzmann relations apply in semiconductor [they were derived starting from Je = Jh =0] n(x)= nieqφ(x)/kT p(x)= nie−qφ(x)/kT and 2 np = at every xni [not the case in p-n junction or BJT under bias]6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-5 2. Depletion regime For VGB> 0 gate ”attracts” electrons, ”repels” holes ⇒ depletion region widens For VGB< 0 gate ”repels” electrons, ”attracts” holes ⇒ depletion region shrinks x ρ 0 xd(VGB) -qNa 0 -tox 0 E Eox Es -tox 0 xd(VGB) x VGB<0 VGB=0 VGB>0 φB+VGB φ φB xd(VGB) 0 -tox x 0 log p, n p n Na ni2 Na x-tox 0 xd(VGB)�������6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-6 In depletion regime, all results obtained for zero bias ap-ply if φB → φB + VGB . For example: • depletion region thickness: xd(VGB )= �s Cox [ 4(φB + VGB )1+ − 1]γ2 • p otential drop across semiconductor SCR: 2qNaxd(VGB )VB(VGB )= 2�s • p otential drop across oxide: qNaxd(VGB )toxVox(VGB )= �ox6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-7 3. Flatband At a certain negative VGB, depletion region is wiped out Flatband ⇒ x ρ ρ=0 0 0 -tox E Eox=0 Es=0 0 x -tox φ VGB=0 VGB=VFB -tox 0 VGB=-φB 0 0 x log p, n p n Na ni2 Na x0-tox Flatband voltage: VFB = −φB6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-8 4. Accumulation regime If VGB <VFB accumulation of holes at Si/SiO2 interface x ρ 0 0-tox x x φ 0 0 0 0 -tox -tox E Es Eox VGB-VFB log p, n p n Na ni2 Na x0-tox6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-9 5. Threshold Back to VGB> 0. For sufficiently large VGB> 0, electrostatics change when n(0) = Na ⇒ threshold. Beyond threshold, cannot neglect contributions of elec-trons towards electrostatics. log p, n p n Na ni2 Na x0-tox xdmax n(0)=Na Let’s compute the voltage (threshold voltage) that leads to n(0) = Na. Key assumption: use electrostatics of depletion (neglect electron concentration at threshold).6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-10 � Computation of threshold voltage. Three-step process: • First, compute potential drop in semiconductor at thresh-old. Start from: n(0) = nieqφ(0)/kT Solve for φ(0) at VGB = VT: kT n(0) kT Naφ(0)|= ln VT = ln = −φpVT q ni |q ni Hence: x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB VB(VT)= −2φp���� ���� 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-11 • Second, compute p otential drop in oxide at threshold. Obtain xd(VT) using relationship between VB and xd in depletion: 2qNaxd(VT)VB(VT )= = −2φp2�s Solve for xd(VT): xd(VT )= xdmax = 2�s(−2φp) qNa Then: qNaxd(VT)Vox(VT )= Eox(VT)tox = tox = γ −2φp�ox x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB Vox� � 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-12 • Finally, sum potential drops across structure. x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB Vox VT + φB = VB(VT)+ Vox(VT)= −2φp + γ 2φp−Solve for VT: VT = VFB − 2φp + γ 2φp−Key dependencies: VT ↑. The higher the doping level, the • If Na ↑→ more voltage required to produce n(0) = Na. • If Cox ↑ (tox ↓) → VT ↓. The thinner the oxide, the less voltage dropped across it.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-13 6. Inversion What happens for VGB >VT? More electrons at Si/SiO2 interface than acceptors inversion.⇒ log p, n p n Na ni2 Na x0-tox xdmax inversion layer Electron concentration at Si/SiO2 interface modulated by VGB ⇒ VGB ↑→ n(0) ↑→ |Qn|↑field-effect control of mobile charge! [essence of MOSFET] Want to compute Qn vs. VGB [charge-control relation] Make sheet charge approximation: electron layer at semi-conductor surface is much thinner than any other dimen-sion in problem (tox,xd).6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-14 � Charge-control relation Let us look at overall electrostatics: x ρ 0 xdmax -qNa 0-tox Qn 0 E Eox Es x-tox 0 xdmax x φ 0 log p, n p n Na ni2 Na xdmax 0 -tox VGB+φB -tox 0 xdmax x����� ���6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-15 Key realization: Qn|∝n(0) ∝ eqφ(0)/kT|| φ(0)QB|∝ Hence, as VGB ↑ and φ(0) ↑, will change a lot, but|Qn|will change very little.|QB|Several consequences: • little change in φ(0) beyond threshold • VB does


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MIT 6 012 - Electrostatics of Metal­-Oxide-­Semiconductor Structure

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