6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-1 Lecture 9 - MOSFET (I) MOSFET I-V Characteristics October 6, 2005 Contents: 1. MOSFET: cross-section, layout, symbols 2. Qualitative operation 3. I-V characteristics Reading assignment: Howe and Sodini, Ch. 4, §§4.1-4.3 Announcements: Quiz 1: 10/13, 7:30-9:30 PM, (lectures #1-9); open book; must have calculator.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-2 Key questions • How can carrier inversion be exploited to make a tran-sistor? • How does a MOSFET work? • How does one construct a simple first-order model for the current-voltage characteristics of a MOSFET?6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-3 1. MOSFET: layout, cross-section, symbols polysilicon gate source gate body channel p p n n p+ n+n+ n+ p+ n+ n+ n+n+ gate length STI edge drain gate oxide inversion layer gate width Key elements: • inversion layer under gate (depending on gate voltage) • heavily-doped regions reach underneath gate ⇒ in -version layer electrically connects source and drain • 4-terminal device: body voltage important6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-4 Image removed due to copyright restrictions.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-5 2 Circuit symbols Two complementary devices: • n-channel device (n-MOSFET) on p-Si substrate (uses electron inversion layer) • p-channel device (p-MOSFET) on n-Si substrate (uses hole inversion layer) D− VSD > 0 VDS > 0D DIDnIDn SS+ + + VSG VSB _ _G GB B G B+ + BG VBSVGS _ S− _ DS −IDp −IDp (a) n-channel MOSFET (b) p-channel MOSFET6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-6 2. Qualitative operation Water analogy of MOSFET: • Source: water reservoir • Drain: water reservoir • Gate: gate between source and drain reservoirs VDS VGS ID G source draingate VGS VDS watern+ n+ n+ p S D B depletion region inversion layer Want to understand MOSFET operation as a function of: • gate-to-source voltage (gate height over source water level) • drain-to-source voltage (water level difference between reservoirs) Initially consider source tied up to body (substrate or back).re6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-7 Three regimes of operation: 2 Cut-off gime:Cut-off regime: • MOSFET: VGS <VT , VGD <VT with VDS > 0. • Water analogy: gate closed; no water can flow regardless of relative height of source and drain reservoirs. VGD<VTVGS<VT n+ n+ n+ p S G D no inversion layer anywhere depletion region no water flow ID =06.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-82 Linear or Triode regime:• MOSFET: VGS>VT, VGD>VT, with VDS> 0.• Water analogy: gate open but small difference in heightbetween source and drain; water flows.VGD>VTVGS>VTn+n+n+pSGDinversion layer everywheredepletionregionElectrons drift from source to drain ⇒ electrical current!• VGS↑→ |Qn|↑→ ID↑• VDS↑→ |Ey|↑→ID↑VDSsmall VDSIDVGS>VT00VGSVTsmall VDSIDVDS0LinearorTriode regime:6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-92 Saturation regime:• MOSFET: VGS>VT, VGD<VT(VDS> 0).• Water analogy: gate open; water flows from source todrain, but free-drop on drain side ⇒ total flow indepen-dent of relative reservoir height!inversion layer"pinched-off"at drain sideVGD<VTVGS>VTn+n+n+pSGDdepletionregionIDindependent of VDS: ID= IDsatVDSIDVDSsat=VGS-VTVGDsat=VT00saturationlinearSaturation regime:Satura6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-10 3. I-V characteristics Geometry of problem: n+ n+ n+ p S G D B 0 L depletion regionVBS=0 VGS VDS ID IS inversion layer y -tox 0 xj x 2 General expression of channel current y-direction: Iy = WQn(y)vy (y) Current can only flow in Drain terminal current is equal to minus channel current: ID = −WQn(y)vy(y)6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-11 ID = −WQn(y)vy(y) Rewrite in terms of voltage at channel location y, Vc(y): • If electric field is not too big: dVc(y) vy(y) −µnEy (y)= µn dy Qn(y)= −Cox[for VGS − Vc(y) ≥ VT . All together: dVc(y) • Qn(y y: VGS − Vc(y) − VT ] For ) use charge-control relation at location ID = WµnCox(VGS − Vc(y) − VT ) dy Simple linear first-order differential equation with one un-known, the channel voltage Vc(y).� � 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-12 Solve by separating variables: IDdy = WµnCox(VGS − Vc − VT )dVc Integrate along the channel in the linear regime: -for y Vc-for y = L, Vc(L)= VDS =0, (0) = 0 (linear regime) Then: LID 0 dy = WµnCox VDS (VGS − Vc − VT )dVc0 or: W VDSID = µnCox(VGS − − VT )VDSL 20 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-13 For small VDS: W ID µnCox(VGS − VT )VDSL Key dependencies: • VDS ↑→ID ↑ (higher lateral electric field) • VGS ↑→ ID ↑ (higher electron concentration) • L ↑→ID ↓ (lower lateral electric field) • W ↑→ID ↑ (wider conduction channel) ID IDsmall VDS VGS>VT 0 0 VDS VT VGS small VDS VDS or regime.This is the linear triode6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-14 In general, W VDSID = µnCox(VGS − − VT )VDSL 2 Equation valid if VGS − Vc(y) ≥ VT at every y. Worst point is y = L, where Vc(y)= VDS, hence, equa-tion valid if VGS − VDS ≥ VT , or: VDS ≤ VGS − VT VDS ID VGS VGS=VT VDS=VGS-VT 0 0 term responsible for bend over of ID: −VDS 2channel debiasing:6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-15 To understand why ID bends over, must understand first :channel debiasing|Qn(y)| 0 Cox(VGS-VT) VDS>0 VDS=0 Ly0 |Ey(y)| 0 VDS>0 VDS=0 y0L Vc(y) VDS VDS>0 VDS=0 0 0 Ly VGS VT VDS 0 L y VGS-Vc(y) local gate overdrive VDS>0 VDS=0 Along channel from source to drain: y ↑→ Vc(y) ↑→|Qn(y)|↓→|Ey(y)|↑ Local ”channel overdrive” reduced closer to drain.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-16 Impact of VDS: |Qn(y)| VDS=0 Cox(VGS-VT) VDS 0 0 L y |Ey(y)| VDS VDS=0 0 0 L y Vc(y) VDS VDS VDS=0 0 0 L y VGS-Vc(y) VDS VDS=0 VGS local gate VDS overdrive VT 0 Ly As VDS ↑, channel debiasing more prominent ⇒ ID rises more slowly with VDScharacteristics6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 9-17 3µm n-channel MOSFET
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