6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-1 Lecture 8 - PN Junction and MOS Electrostatics (V) Electrostatics of Metal-Oxide-Semiconductor Structure (cont.) October 4, 2005 Contents: 1. Overview of MOS electrostatics under bias 2. Depletion regime 3. Flatband 4. Accumulation regime 5. Threshold 6. Inversion regime Reading assignment: Howe and Sodini, Ch. 3, §§3.8-3.9 Announcements: Quiz 1: 10/13, 7:30-9:30 PM, (lectures #1-9); open book; must have calculator.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-2 Key questions • Is there more than one regime of operation of the MOS structure under bias? • What does ”carrier inversion” mean and what is the big deal about it? • How does the carrier inversion charge depend on the gate voltage?6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-31. Overview of MOS electrostatics under biasx0-tox"metal"(n+polySi)oxidesemiconductor(p type)contactcontactVGB+-Application of bias:• built-in potential across MOS structure increases fromφBto φB+ VGB• oxide forbids current flow ⇒– J = 0 everywhere in semiconductor– need drift=-diffusion in SCR• must maintain boundary condition at Si/SiO2inter-face: Eox/Es 3How can this be accommodated simultaneously? ⇒quasi-equilibrium situation with potential build up acrossMOS equal to φB+ VGBquasi-equilibrium situationrelations in6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-4 Important consequence of quasi-equilibrium: ⇒ Boltzmann apply semiconductorBoltzmann relations apply in semiconductor[they were derived starting from Je = Jh =0] nieqφ(x)/kT n(x)= p(x)= nie −qφ(x)/kT and 2 np = n at every x i [not the case in p-n junction or BJT under bias]6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-5 2. Depletion regime For VGB > 0 gate ”attracts” electrons, ”repels” holes ⇒ depletion region widens For VGB < 0 gate ”repels” electrons, ”attracts” holes ⇒ depletion region shrinks x x x ρ φ φB φB+VGB 0 0 0 log p, n p n Na ni2 Na xd(VGB) xd(VGB) xd(VGB) -qNa 0 0 0 -tox -tox -tox E Eox Es VGB=0 VGB<0 VGB>0 x-tox 0 xd(VGB)� � � � � � 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-6 In depletion regime, all results obtained for zero bias ap-ply if φB → φB + VGB . For example: • depletion region thickness: s 4(φB + VGB ) xd(VGB )= [� 1+ − 1]γ2Cox • potential drop across semiconductor SCR: 2qNaxd(VGB )VB (VGB )= 2s • potential drop across oxide: qNaxd(VGB )toxVox(VGB )= oxand6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-7 3. Flatband At a certain negative VGB, depletion region is wiped out ⇒ Flatband x ρ ρ=0 0 0 -tox E Eox=0 Es=0 0 x-tox 0 0 -tox VGB=0 VGB=VFB φ VGB=-φB 0 x log p, n p n Na ni2 Na -tox 0 x Flatb voltage: VFB = −φB Flatband voltage:6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-8 4. Accumulation regime If VGB <VFB accumulation of holes at Si/SiO2 interface x x x ρ φ 0 0 0 log p, n p n Na ni2 Na 0 0 0 x0 -tox -tox -tox -tox E Es Eox VGB-VFBthreshold voltage6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-9 5. Threshold Back to VGB > 0. For sufficiently large VGB > 0, electrostatics change when n(0) = Na ⇒ threshold. Beyond threshold, cannot neglect contributions of elec-trons towards electrostatics. log p, n p n Na ni2 Na n(0)=Na -tox 0 xdmax x Let’s compute the voltage (( )threshold voltage) that leads to n(0) = Na. Key assumption: use electrostatics of depletion (neglect electron concentration at threshold).6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-10 2 Computation of threshold voltage. Three-step process: • First, compute potential drop in semiconductor at thresh-old. Start from: n(0) = nieqφ(0)/kT Solve for φ(0) at VGB kT kT Naφ(0)|= ln= VT : n(0)|VT = ln = −φpVT q ni q ni x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB Hence: VB(VT )= −2φp� � � � � � 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-11 • Second, compute potential drop in oxide at threshold. Obtain xd(VT ) using relationship between VB and xd in depletion: 2qNaxd(VT )VB(VT )= = −2φp2s Solve for xd(VT ): 2s(−2φp) xd(VT )= xdmax = � qNa Then: Vox(VT )= Eox(VT )tox = qNaxd(VT ) ox tox = γ � −2φp x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB Vox� � 6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-12 • Finally, sum potential drops across structure. x φ 0 xdmax 0 -tox φp -φp VB=-2φp VT+φB Vox VT + φB = VB (VT )+ Vox(VT )= −2φp + γ −2φp Solve for VT : VT = VFB − 2φp + γ −2φp Key dependencies: • If Na ↑→ VT ↑. The higher the doping level, the more voltage required to produce n(0) = Na. • If Cox ↑ (tox ↓) → VT ↓. The thinner the oxide, the less voltage dropped across it.control of mobile ch6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-13 6. Inversion What happens for VGB >VT ? More electrons at Si/SiO2 interface than acceptors ⇒ inversion. log p, n p n Na ni2 Na x0-tox xdmax inversion layer Electron concentration at Si/SiO2 interface modulated by VGB ⇒ VGB ↑→ n(0) ↑→ |Qn|↑field-effect arge! [essence of MOSFET] field-effect control of mobile charge! Want to compute Qn vs. VGB [charge-control relation] Make sheet charge approximation: electron layer at semi-conductor surface is much thinner than any other dimen-sion in problem (tox,xd).6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-14 2 Charge-control relation Let us look at overall electrostatics: x ρ 0 0 xdmax -qNa 0 E Eox Es -tox Qn x-tox 0 xdmax x φ 0 log p, n p n Na ni2 Na xdmax 0 -tox VGB+φB -tox 0 xdmax x6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 8-15 Key realization: |Qn|∝n� (0) ∝ eqφ(0)/kT |QB|∝ φ(0) Hence, as VGB ↑ and φ(0) ↑, |Qn| will change a lot, but |QB| will change very little. Several consequences: • little change in φ(0) beyond threshold • VB does not increase much beyond VB(VT )= −2φp (a thin sheet of electrons does not contribute much to VB ): VB (inv.) VB (VT )= −2φp • little change in QB beyond threshold • xd xd( ) xd(VT )= � � � � � � � 2s(−2φp) qNa = xdmax does not increase much beyond threshold: inv.VVcontrol ove t6.012 - Microelectronic Devices and Circuits
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