Spring 2007 6.012 Microelectronic Devices and Circuits Prof. C.G. Sodini Device Characterization Project #2 – May 2nd 2007 DEVICE CHARACTERIZATION AND CIRCUIT DESIGN Due: May 9th 2007 at recitation Please write your recitation time on your project report. Introduction In this project, you will characterize the current-voltage characteristics of an npn bipolar junction transistor (BJT) and an n-MOSFET. To do this, you will use the MIT Microelectronics WebLab. The npn BJT is available in location 5 of WebLab. It is labeled “npn BJT”. The n-MOSFET is in location 4, labeled “nMOSFET”. This exercise involves three phases: (i) characterization of the devices, large and small signal parameter extraction, (ii) using the measurements to choose bias voltages for a common collector amplifier to meet amplifier specifications, and (iii) using the measurements to determine small signal two port model parameters at the bias point. Take the measurements specified in the following pages. When you are happy with the results (as judged by the characteristics displayed through the web), download the data to your local machine for more graphing and further analysis. You will find it useful to study the contents of Appendix A, which describes what the measured data should roughly look like and gives a short overview of the relevant equations. The WebLab server is available at http://ilab.mit.edu/ Important: Only hand in items for which you are asked. Do not hand in extra items, such as dumps of your measured data. Late Policy: Late projects will only receive 50% of the normal grade. You are advised to measure the devices early. If you start only one or two days before the project is due, and for whatever reasons you cannot get your measurements done, you will not be granted an extension! While we try to fix problems (blown devices, etc.) as soon as possible, the response time may not be instant.Design of Common Collector Amplifier with NMOS Current Source In this assignment you will characterize both an npn-BJT and an NMOS transistor, and use the measurements to design a common collector (emitter follower) amplifier with an NMOS current source, shown in Figure 1. In the design, you will choose the bias voltage VB of the NMOS current source and the DC bias voltage, VBIAS, in order to meet the following specs. The low power supply voltage found in today’s portable electronics makes for challenging circuit design. The voltage gain, input resistance, and output resistance specs must be met for all values of the output voltage swing, 0.3V Æ 1.2V. You will find that the amplifier specifications are easy to meet nominally, but are difficult to achieve at the edge of the voltage swings due to the decrease in device output resistance. DC voltage gain Av0 ≥ 0.95 Input resistance Rin > 1 MΩ Output resistance Rout < 1.5 kΩ Voltage swing 0.3V Æ 1.2V Supply voltage VDD = 1.5 V DC Output voltage VOUT = 0.75 V Figure 1: Common collector amplifier with NMOS current source Device Characterization (50 points) 1) (20 points) Obtain I-V characteristics for the BJT and the NMOS transistor. For the NMOS, use a maximum VDS and VGS of 3 Volts. Measure ID vs. VDS with VGS as a parameter. For the BJT, measure IC vs. VCE as a function of various IB. You can find the range of IB for the BJT characterization by measuring the NMOS first. The range of IB should be such that the resulting IC is of the same order of magnitude as your measured ID (since the amplifier operating point must have ID = IC). Also, to find gm and rπ, measure ICand IB as a function of VBE. Because of the exponential dependence, you must be careful with the value of VBE you apply. Values above 0.9 V can damage the device! Look at your output characteristics for the BJT. If you also recorded VBE in the measurements, you can get an idea of what values of VBE to use. Do this measurement for various values of VCE. Download the data onto your computer for use in Matlab, Excel or the plotting tool of your choice. Show your measurement results in the following way: graph 1: output characteristics of the BJT, IC vs. VCE, for different values of IB. graph 2: output characteristics of the NMOS, ID vs. VDS, for different values of VGS. graph 3: for the BJT, plot IC vs. VBE, with values of VCE > VCEsat. graph 4: for the BJT, plot IB vs. VBE, with values of VCE > VCEsat. Note: Screen-shots of the WebLab measurements are not acceptable as graphs. Graphs must be appropriately labeled (by hand is okay) for full credit. Hand in: 4 graphs as specified 2) (30 points) So that you can select a bias point, you will need to graph some of the small signal parameters as a function of the bias point. Numerical differentiaion to find the output resistance as a function of VDS and VCE can lead to noisy results, as seen in Appendix B. Make sure to calculate the output resistance based on an average around your bias point. graph 5: plot the output resistance (ro) of the NMOS as a function of VDS, for different values of ID. graph 6: plot the output resistance (ro) of the BJT as a function of VCE, for different values of IC. graph 7: for VDS = 1.5 V, plot the output resistance (ro) of the NMOS as a function of ID. graph 8: for VCE = 1.5 V, plot the output resistance (ro) of the BJT as a function of IC. graph 9: plot the transconductance (gm) as a function of IC, for VCE = 1.5 V. graph 10: plot rπ of the BJT as a function of IC for VCE = 1.5 V. Hand in: 6 graphs as specified, appropriately labeled Amplifier Design (50 points) 1) (20 points) (Small Signal - 20 points) To help you determine the bias voltages, for the amplifier circuit of Figure 1, write down the equations for the DC voltage gain (Avo) and the input and output resistances (Rin, Rout) in terms of the parameters derived from the measurements (gm, roBJT , roMOS, rπ). Do not make simplifying assumptions (i.e. include effect of ro) Take the requirements that the specs pose on Avo, (Rin, Rout and the equations from above to solve for conditions that the specs pose on gm, ro, and rπ. For what range of ISUP = IC = ID do you meet the specs? Hand in: expressions as specified (show your work that leads to them or state where you found them), range of ISUP that meets the specs.2) (30 points) (Bias point selection - 30 points) Now that you have expressed the specs in terms of the measured small signal parameters and the requirements imposed on them, choose bias voltages
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