•Common-source amplifier with current-sourceLecture 19 Transistor Amplifiers (I) Common-Source Amplifier Outline • Amplifier fundamentals • Common-source amplifier • Common-source amplifier with current-source supply 6.012 Spring 2009 Lecture 19 1 Reading Assignment:Howe and Sodini; Chapter 8, Sections 8.1-8.4Amplifier Fundamentals • Source resistance RS is associated only with small signal sources • Choose ID = ISUP • DC output current – IOUT = 0 – VOUT = 0 Input� sources Intrinsic� Amplifier V+ Load 6.012 Spring 2009 Lecture 19 2 + − + − v s i s RS vIN = VBIAS + v s iIN = IBIAS + i s VBIAS IBIAS RS Voltage Input Current Input Supply� Current � ISUP Active � Device� iD = f(input) ISUP RL iOUT = id iD + − V − V Input vOUT2. Common-Source Amplifier: Consider the following circuit: V+=VDD iRRD signal source vs RS signal iD + load RL vOUT VBIAS -• VBIAS, RD and W/L of MOSFET selected to bias transistor in saturation and obtain desired output bias point (i.e. VOUT = 0). • Consider intrinsic voltage amplifier - no loading •RS = 0 •RL ---> ∞ • VGS = VBIAS - VSS V -=VSS 6.012 Spring 2009 Lecture 19 3 Watch notation: vOUT(t)=VOUT+vout(t)OUTVGGVSS=VDDVSSVGGVSSVGGVSS=VTVGG-VSSTransfer characteristics of amplifier: Load line view of amplifier: VOUT VOUT - ---0 IR=ID VSS VDD VDD-VSS RD load line VBIAS - Vss = VDD - VSS VBIAS - Vss VBIAS - Vss = VT • Bias point calculation; • Limits to signal swing • Small-signal gain; • Frequency response [in a few days] Want: 0 - VDD-VSS VT VDD VSS VBIAS - Vss 6.012 Spring 2009 Lecture 19 4W()2VBias point: choice of VBIAS, W/L, and RD to keep transistor in saturation and to get proper quiescent VOUT. Assume MOSFET is in saturation: ID = W µµµµnCox (VBIAS − VSS − VT )2 2L VDD − VOUTIR = RD If we select VOUT=0: Then: Equation that allows us to compute needed VBIAS given RD and W/L. ID = IR = W 2 L µµµµnCox VBIAS − VSS − VT( )2 = VDD RD VBIAS = 2ID W L µµµµnCox + VSS + VT 6.012 Spring 2009 Lecture 19 5v=VVDD Signal swing: vs VBIAS vOUT RD RS signal source + -VSS • Upswing: limited by MOSFET going into cut-off. vout,max = VDD • Downswing: limited by MOSFET leaving saturation. VDS ,sat = VGS − VT = 2I D W L µµµµnCox or Then: vout ,min − VSS = VBIAS − VSS − VT vout,min = VBIAS − VT 6.012 Spring 2009 Lecture 19 6Generic view of the effect of loading on small-signal operation Two-port network view of small-signal equivalent circuit model of a voltage amplifier: Rin is input resistance Rout is output resistance Avo is unloaded voltage gain Rs Rout ++ ++ vs vin Rin Avovin vout RL ----Voltage divider at input: Voltage divider at output: Loaded voltage gain: vin = Rin vs Rin + Rs vout = RL Avovin Rout + RL vout vs = Rin Rin + RS Avo RL RL + Rout unloaded circuit output- loading input- loading 6.012 Spring 2009 Lecture 19 7Small-signal voltage gain Avo : draw small-signal equivalent circuit model: Remove RL and RS G S D + -vt + -vgs + -vout gmvgs ro RD Then unloaded voltage gain: Avo = vout vt = −gm ro // RD( ) vout = −gmvt ro // RD( ) + -vt + -vout gmvt (ro//RD) 6.012 Spring 2009 Lecture 19 8vInput Resistance • Calculation of input resistance, Rin: – Load amplifier with RL – Apply test voltage (or current) at input, measure test current (or voltage). For common-source amplifier: + + it 6.012 Spring 2009 Lecture 19 9 No effect of loading at input. it = 0 ⇒ Rin = vt it = ∞ + --vgs vt gmvgs (ro//RD) RLvvg v(r //R )RS+Output Resistance • Calculation of output resistance, Rout: – Load amplifier with RS – Apply test voltage (or current) at output, measure test current (or voltage). – Set input source equal zero For common-source amplifier: + + it 6.012 Spring 2009 Lecture 19 10 vgs = 0 ⇒ gmvgs = 0 ⇒ vt = it ro // RD( ) Rout = vt it = ro // RD --vgs vtgmvgs (ro//RD)RSTwo-port network view of common-source amplifier Voltage Amplifier + -vin + -vout Avovin Rout + -Rin Rs vs + -RL Intrinsic circuit output loading input loading vout vs = Rin Rin + RS Avo RL RL + Rout vout vs = −gm ro // RD( ) RL RL + ro // RD = −gm ro // RD // RL( ) 6.012 Spring 2009 Lecture 19 11Current Source Supply I—V characteristics of current source: iSUP + 1IrSUP oc iSUP vSUP _ vSUP Equivalent circuit models : • iSUP = 0 for vSUP ≤ 0 • iSUP = ISUP + vSUP/ roc for vSUP > 0 • High small-signal resistance roc. ISUP r oc iSUP vSUP + _ r oc large-signal model small-signal model 6.012 Spring 2009 Lecture 19 123. Common-source amplifier with current-source supply VDD iSUP signal source RS vs VBIAS vOUT iD RL + -signal load VSS Loadline View VOUT VBIAS-VSS=VDD-VSS VBIAS-VSS VBIAS-VSS=VT 0 iSUP=ID VDD load line ISUP VSS 6.012 Spring 2009 Lecture 19 13Use PMOS for current source supply VDD VB iSUP signal source vs RS iD vOUT VBIAS VSS Bias point: Assume both transistors in saturation ISUP = IDn = W 2L n µµµµnCox VBIAS − VSS − VTn( )2 ISUP = −IDp = W 2L p µµµµpCox VDD − VB + VTp( )2 VBIAS = 2ISUP W L n µn C ox + VSS + VTn Bias point: Assume both transistors in saturation VOUT = 0. Choose ISUP and determine VB. Set -IDp = IDn for VOUT ~ 0 6.012 Spring 2009 Lecture 19 14VDD Signal swing: VB iSUP signal source vs RS iD vOUT VBIAS • Upswing: limited by PMOS leaving saturation. VSS • Downswing: limited by NMOS leaving saturation. • Same result as with resistive supply current. VSD, sat = VSG + VTp = VDD − VB + VTp VDD − vout,max = VDD − VB + VTp vout,max = VB − VTp vout,min = VBIAS − VT 6.012 Spring 2009 Lecture 19 153. Common-source amplifier with current- source supply (contd.) Current source characterized by high output resistance: roc. Significantly higher than amplifier with resistive supply. p-channel MOSFET: r = 1/λIDp oc VDD VB iSUP signal source iDRS • Voltage gain: Avo = -gm (ro//roc). • Input resistance :Rin = ∞ • Output resistance: Rout = r o//roc . vs VBIAS vOUT VSS 6.012 Spring 2009 Lecture 19 16vonouRelationship between circuit figures of merit and device parameters Remember: W gm = 2ID µµµµnCox L r ≈ 1 ∝ L o λλλλnID ID Then: Circuit Parameters |A | RRi t * adjustments are made to VBIAS so that none of the other parameters change Device* Parameters |Avo| Rin Rout gm(ro//roc) ∝ ro//roc ISUP ↑ ↓ -↓ W ↑ ↑ - -L ↑ ↑ -↑ CS amplifier with current source supply is a good
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