6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-1 Lecture 26 - 6.012 Wrap-up December 13, 2005 Contents: 1. 6.012 wrap-up Announcements: exam TA review session: December 16, 7:30-9:30 PM, Final exam: December 19, 1:30-4:30 PM, duPont; open book, calculator required; entire subject under examina-tion but emphasis on lectures #19-26. Final6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-2 1. Wrap up of 6.012 2 The amazing properties of Si • two types of carriers: electrons and holes – however, can make good electronic devices with just one, i.e. MESFET (Metal-Semiconductor Field-Effect Transistor), or HEMT (High Electron Mo-bility Transistor) – but, can’t do complementary logic (i.e. CMOS) without two6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-3 • carrier concentrations can be controlled by addition of dopants – over many orders of magnitude (about 20!) – and in short length scales (nm range) 37 nm gate length MOSFET from Intel (IEDM ’05) Image removed due to copyright restrictions.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-4 • carrier concentrations can be controlled electrostati -cally over many orders of magnitude (easily 10!)6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-5 • carriers are fast: – electrons can cross L =0.1 µm in about: L 0.1 µmτ = =107 cm/s =1 ps ve – high current density: −3Je = qnve =1.6 × 10−19 C × 1017 cm × 107 cm/s =1.6 × 105 A/cm2 ⇒ high current drivability to capacitance ratio • extraordinary physical and chemical properties – can control doping over 8 orders of magnitude (p type and n type) – can make very low resistance ohmic contacts – can effectively isolate devices by means of pn junc-tions, trenches and SOI6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-6 2 The amazing properties of Si MOSFET source gate body polysilicon gate p p+ n+n+ n+ drain gate oxide inversion layer n channel • ideal properties of Si/SiO2 interface: – can drive surface all the way from accumulation to inversion (carrier density modulation over 16 orders of magnitude) – not possible in GaAs, for example6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-7 • performance improves as MOSFET scales down in size; as L, W ↓: – current: W ID = µCox(VGS − VT )2 unchanged 2L– capacitance: Cgs = WLCox ↓↓ – figure of merit for device switching delay: CgsVDD = L2 2VDD ↓↓ ID µ(VGS − VT )2 • No gate current. • VT can be engineered. • MOSFETs come in two types: NMOS and PMOS. • Easy to integrate.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-8 2 The amazing properties of Si CMOS • Rail-to-rail logic: logic levels are 0 and VDD. • No power consumption while idling in any logic state. • Scales well. As L, W ↓: – Power consumption (all dynamic): DD ∝ fW LCoxV 2Pdiss = fCLV 2 DD ↓↓ – Propagation delay: CLVDD tP ∝ W ↓↓ L µCox(VDD − VT )2 – Logic density: 11 Density ∝ = ↑↑ A WL6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-9 1993 0.1 1 10 100 1995 2 ) 1997 1999 2001 2003 2005 2007 2 generation Transistor density continues to double every 2 years Cell Area (umINTEL 6-T SRAM CELL SIZE TREND 0.5x every 2 years 0.57 umcell on 65 nm Figure by MIT OCW.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-10 8086 8080 286 486TM RPentium RPentium RPentium RItanium Processor RItanium RPentium Processor 1970 1975 1980 1985 1990 1995 2005 1,000 10,000 100,000 1,000,000 10,000,000 100,000,000 1,000,000,000 2000 4004 8008 386TM Processor MOORE'S LAW DX Processor II Processor III Processor 4 Processor 2 Processor Transistors Figure by MIT OCW.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-11 2 MOSFET scaling Straight MOSFET scaling doesn’t work.• electric field increases VDDEy ↑ L • power density increases Pdiss fW LCoxV 2 ∝ DD = fCoxV 2 device area WL DD But Pdiss tP ↓↓⇒ f ↑↑⇒ ↑↑⇒ T ↑↑ device area6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-12 • total power increases 1985 0 10 100 1987 1989 1991 1993 1995 1997 1999 2001 2003 INTEL POWER OVER TIME Year Power (watts) Figure by MIT OCW.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-13 ⇒ must scale VDD6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-14 Where is this going? Image removed due to copyright restrictions.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-15 The future of microelectronics according to Intel: Image removed due to copyright restrictions.6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-16 2 Exciting times ahead in Si IC technology: • analog electronics (since ∼ 50s): amplifiers, mixers, oscillators, DAC, ADC, etc. • digital electronics (since ∼ 60s): computers, micro-controllers, random logic, DSP • solid-state memory (since ∼ 60s): dynamic random-access memory, flash • energy conversion (since ∼ 70s): solar cells • power control (since ∼ 70s): ”smart” power • communications (since ∼ 80s): VHF, UHF, RF front ends, modems, fiber-optic systems • sensing, imaging (since ∼ 80s): photodetectors, CCD cameras, CMOS cameras, many kinds of sensors • micro-electro-mechanical systems (since ∼ 90s): ac-celerometers, movable mirror displays • biochip (from ∼ 2000): DNA sequencing, µfluidics • vacuum microelectronics (from ∼ 2000?): field-emitter displays • ??????? (microreactors, microturbines, etc.)6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-17 2 Circuit design lessons from 6.012: 1. Importance of optimum level of abstraction: • device physics equations, i.e.: W ID = µCox(VGS − VT )2 , etc. 2L• device equivalent circuit models, i.e.: Cgd id G + -vgs Cgs Cgb Csb gmvgs gmbvbs ro + vbs -D S B Cdb • device SPICE models, i.e.: RD RS drain source bulk + − − qGD− qBD+ − qBS+ − vBD′+ − vBS' + qGS− qGB− + + + vGD′ D′ S′ IDS(VGS, VDS, VBS) IS IS gate ID6.012 - Microelectronic Devices and Circuits - Fall 2005 Lecture 26-18 2. Many considerations in circuit design: • multiple performance specs: – in analog systems: gain, bandwidth, power
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