W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaThe CMOS Inverter: Current Flow during SwitchingVINVOUTVDDVDD00N: offP: linN: linP: offN: linP: satN: satP: linN: satP: satABDECiiiSDGGSDVDDVOUTVINW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaPower Dissipation due to Direct-Path CurrentVDD-VTVTtimevIN:i:IpeakVDD00iSDGGSDVDDvOUTvINpeakDDscdpIVtE=Energy consumed per switching period:tscW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaAn NMOSFET is a closed switch when the input is highN-Channel MOSFET OperationNMOSFETs pass a “strong” 0 but a “weak” 1Y = X if A and BY = X if A or BBAXBAXYYW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaA PMOSFET is a closed switch when the input is lowP-Channel MOSFET OperationPMOSFETs pass a “strong” 1 but a “weak” 0Y = X if A and B= (A + B)Y = X if A or B= (AB)BAXBAXYYW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaPull-Down and Pull-Up Devices• In CMOS logic gates, NMOSFETs are used to connect the output to GND, whereas PMOSFETs are used to connect the output to VDD.– An NMOSFET functions as a pull-down device when it is turned on (gate voltage = VDD)– A PMOSFET functions as a pull-up device when it is turned on (gate voltage = GND)F(A1, A2, …, AN)PMOSFETs onlyNMOSFETs only……Pull-upnetworkPull-downnetworkVDDA1A2ANA1A2ANinput signalsW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaCMOS NAND Gate011101110100FBAAFBA BVDDW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaCMOS NOR GateAFBABVDD011001010100FBAW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaCMOS Pass GateAXYAY = X if AW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaLogic Gates – From Week 9bABF=A·BANDF = ABNANDBA⋅NORABBA+NOTAAORABF=A+BEXCLUSIVE ORABBAF⊕=F =W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaLogic Gates – How are they used?ABC=A·BANDFirst of all we must agree on what is high (logical 1) or low (logical 0). Suppose 1.5 V is 1 and 0V is logical 0.C would have the value of 1.5 V (logical 1).But it would have the value of 0V (logical 0) if either one of the inputs were held at zero V.AND1.5V+-1.5V+-W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaWhat are the most basic gates in Digital Electronics?ABABAB0001101100011110Not-AND = NANDABABABA+BBA+0001101101111000Not-OR = NORABBA+Typically use one or the other: “NAND logic” or “NOR logic”W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaHow to Combine Gate to Produce a Desired Logic Function?(This is called Logical Synthesis)Not-AND = NANDABABABNOTABANDLogically just an AND plus a NOT gate:ExampleABABANDShorthand for NOTW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaHow to Combine Gate to Produce a Desired Logic Function?(More basic Logical Synthesis)AABExampleF= A B.BABA B.Again a little shorthand is usefulW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaHow to Combine Gate to Produce a Desired Logic Function?(More basic Logical Synthesis)Suppose we are given a truth table (all logic statements can be represented by a truth table). How can we implement the function?Answer: There are lots of ways, but one simple way is implementation from “sum of products” formulation.How to do this: 1) Write sum of products expression from truth table and 2) Implement using standard gates.(Warning this is probably inefficient – we need to minimize, or simplify the expression)W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaHow to Combine Gate to Produce a Desired Logic Function?(More basic Logical Synthesis)Example:01111011010100011010C010010100000FBAorClearly: F= 1 ifC = 1BACAB =1i.e.F= C +ABBACW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaHow to Combine Gate to Produce a Desired Logic Function?(More basic Logical Synthesis)Example:01111011010100011010C010010100000FBAF= C +ABB ACABCABCFW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaMore Logical SynthesisExample:111001110000FBAF=A +ABB ABABFClearlyThusBut it is easy to show that a simpler valid expression for F is F = B , hence:B F(ignore A)W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaWhat circuit of logic gates could produce these (arbitrarily chosen) outputs F in response to inputs A, B and C? ABCF00000010010101111000101111001111W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaABCABCAB CFABCABCABCABCExample of general purpose circuit to implement the truth table of Table 22.4. (This solution is NOT minimized.)W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaRules of boolean algebra. The two entries in the last row are used frequently and are known as DeMorgan’s theorem.AND Rules OR RulesA•A = A A+A = AA•A = 0 A+A = 10•A = 0 0+A = A1•A = A 1+A = 1A•B = B•A A+B = B+AA(BC) = (AB)C A+(B+C) = (A+B)+CA(B+C) = AB+AC A+BC = (A+B)(A+C)A•B = A+B A+B = A•BW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaLogical SynthesisGuided by DeMorgan’s TheoremDemorgan’s Theorem :[] C B A CBA =++or[] C BA CBA =++Thus, for example:CDAB CD AB F•=+=ABCDFThus any sum of products expression can be immediately synthesized from NAND gates aloneW. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of CaliforniaKarnaugh Maps• Graphical approach to minimizing the number of terms in a logic expression:1. Map the truth table into a Karnaugh map (see below)2. For each 1, circle the biggest block that includes that 13. Write the product that corresponds to that block.4. Sum all of the productsAB2-variableKarnaugh Map0110A10BC00 01 11 103-variableKarnaugh Map4-variable Karnaugh MapCD00 01 11 10AB00011110W. G. OldhamEECS 40 Fall 2001 Lecture 2 Copyright Regents of University of
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