PowerPoint PresentationSlide 2GENERALIZATION OF KCL TO SURFACESKIRCHHOFF’S CURRENT LAW USING SURFACESBRANCH AND NODE VOLTAGESKIRCHHOFF’S VOLTAGE LAW (KVL)FORMAL CIRCUIT ANALYSIS USING KCL: NODAL ANALYSISNODAL ANALYSIS USING KCL –Example: The Voltage Divider –GENERALIZED VOLTAGE DIVIDER (solved without Nodal Analysis)Slide 10RESISTORS IN PARALLELIDENTIFYING SERIES AND PARALLEL COMBINATIONSIDENTIFYING SERIES AND PARALLEL COMBINATIONS (cont.)TWO-TERMINAL LINEAR RESISTIVE NETWORKS (“One Port” Circuit)BASIS OF THÉVENIN THEOREMI-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKSSlide 17Slide 18Slide 19Slide 20Slide 21Slide 22Simplification for time behavior of RC CircuitsRC RESPONSESlide 25Slide 26Review of simple exponentials.Further Review of simple exponentials.Slide 29Slide 30SIGNAL DELAY: TIMING DIAGRAMS12/6/2004 EE 42 fall 2004 lecture 40 1Lecture #40: Review of circuit concepts•This week we will be reviewing the material learned during the course•Today: review–passive devices–circuit concepts–Load lines –RC transients12/6/2004 EE 42 fall 2004 lecture 40 2BRANCHES AND NODESCircuit with several branches connected at a node: branch (circuit element)3i2i4i1i(Sum of currents entering node) (Sum of currents leaving node) = 0q = charge stored at node is zero. If charge is stored, for example in a capacitor, then the capacitor is a branch and the charge is stored there NOT at the node. KIRCHOFF’s CURRENT LAW12/6/2004 EE 42 fall 2004 lecture 40 3GENERALIZATION OF KCL TO SURFACESSum of currents entering and leaving any “black box” is zeroCould be a big chunk of circuit in here, e.g., could be a “Black Box”In other words there can be lots of nodes and branches inside the box.12/6/2004 EE 42 fall 2004 lecture 40 4KIRCHHOFF’S CURRENT LAW USING SURFACESExampleiA 2A 5 entering leaving5 A2 Ai = ?surfacei must be 50 mA50 mAi?Another examplei=7A12/6/2004 EE 42 fall 2004 lecture 40 5BRANCH AND NODE VOLTAGESThe voltage across a circuit element is defined as the difference between the node voltages at its terminalsSpecifying node voltages: Use one node as the implicit reference (the “common” node … attach special symbol to label it)Now single subscripts can label voltages:e.g., vb means vb ve, va means va ve, etc.cev2v1dab++0ve(since it’s the reference)ad2vvv select as ref. “ground”12/6/2004 EE 42 fall 2004 lecture 40 6KIRCHHOFF’S VOLTAGE LAW (KVL)The algebraic sum of the “voltage drops” around any “closed loop” is zero.Voltage drop defined as the branch voltage if the + sign is encountered first; it is (-) the branch voltage if the sign is encountered first … important bookkeepingWhy? We must return to the same potential (conservation of energy).+ -V2Path“rise” or “step up”(negative drop)+ -V1Path“drop”Closed loop: Path beginning and ending on the same node12/6/2004 EE 42 fall 2004 lecture 40 7FORMAL CIRCUIT ANALYSIS USING KCL:NODAL ANALYSIS 2 Define unknown node voltages (those not fixed by voltage sources)1 Choose a Reference Node4 Solve the set of equations (N equations for N unknown node voltages)3Write KCL at each unknown node, expressing current in terms of the node voltages (using the constitutive relationships of branch elements)12/6/2004 EE 42 fall 2004 lecture 40 8NODAL ANALYSIS USING KCL–Example: The Voltage Divider –1 Choose reference node2 Define unknown node voltagesV23 Write KCL at unknown nodes2212SSR0VRVV4 Solve:212SS2RRRVV+V2R1VSS+i2i1R2This is of course the voltage divider formula and is by itself very useful.12/6/2004 EE 42 fall 2004 lecture 40 9GENERALIZED VOLTAGE DIVIDER(solved without Nodal Analysis)Circuit with several resistors in series R2R1VSSIR3R4 + + +V1 ?V3?• We know)RRR/(RVI4321SS• Thus,SS432111VRRRRRV andSS432133VRRRRRV etc.. etc..12/6/2004 EE 42 fall 2004 lecture 40 10WHEN IS VOLTAGE DIVIDER FORMULA CORRECT?R2R1VSSIR3R4 + +SS432122VRRRRRV Correct if nothing elseconnected to nodes3VSSIR2R1R3R4 + +ZVR5iXSS43212ZVRRRRRVbecause R5 removes condition ofresistors in series – i.e. Ii3What is VZ?Answer: SS435212V)RR(RRRRV212/6/2004 EE 42 fall 2004 lecture 40 11RESISTORS IN PARALLELR2R1 ISSI2I12 Define unknown node voltages VX1 Select Reference Node21SSXR1R11IVNote: Iss = I1 + I2, i.e.,2X1XSSRVRVI 2121SSRRRRIRESULT 1 EQUIVALENT RESISTANCE:212121||RRRRR||RRRESULT 2 CURRENT DIVIDER:211SS2X2212SS1X1RRRI RV IRRRIRVI12/6/2004 EE 42 fall 2004 lecture 40 12IDENTIFYING SERIES AND PARALLEL COMBINATIONSUse series/parallel equivalents to simplify a circuit before starting KVL/KCL1R2R3ReqR +VIRRRR214R3R65K 10RR21 K20R3 K55R4 K10R6 +IRX ?654321XR||)R(RR||)R(RR K1521RR 3Rparalleleq321RR||)RR( 12/6/2004 EE 42 fall 2004 lecture 40 13IDENTIFYING SERIES AND PARALLEL COMBINATIONS(cont.)Some circuits must be analyzed (not amenable to simple inspection) -+R2R1VIR4R3R5Special cases:R3 = 0 OR R3 = R1 and R5 are not in seriesR1 and R2 are not in ||OR IF R3 = (R1 + R5) || (R2 + R4)R1 +R4R5R2VR3Req = R1 || R2 + R4 || R5Example: R3 = 0 R1 || R2; R4 || R5 in series;12/6/2004 EE 42 fall 2004 lecture 40 14TWO-TERMINAL LINEAR RESISTIVE NETWORKS(“One Port” Circuit)Model of two-terminal linear resistive elements with only two “accessible” terminalsReplace a complicated circuit with a simple model+ab12/6/2004 EE 42 fall 2004 lecture 40 15BASIS OF THÉVENIN THEOREM•All linear one-ports have linear I-V graph•A voltage source in series with a resistor can produce any linear I-V graph by suitably adjusting V and IWe define the voltage-source/resistor combination that replicates the I-V graph of a linear circuit to be the Thévenin equivalent of the circuit. The voltage source VT is called the Thévenin equivalent voltage and the resistance RT is called the Thévenin equivalent resistance.THUS12/6/2004 EE 42 fall 2004 lecture 40 16I-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKSi+v+5VApply v, measure i, or vice versa5.51v(V)-.5i(mA)-1Associated(i defined in)5KAssociatedWhat is the easy way to find the I-V graph?First find open-circuit Vv=5V if i = 0Now find Short-circuit Ii = -1mA if v = 012/6/2004 EE 42 fall 2004 lecture 40 17I-V CHARACTERISTICS OF LINEAR
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