1Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003EECS 42 Introduction Digital ElectronicsLecture # 24 Current Flow in Silicon and N-MOS DevicesPhysics of current flow, resistance, resistivityA) Charge transport in a sheet and velocity saturationB) N-MOS Device Structure and Voltage ControlC) N-MOS I vs. V at low and high drain voltageReading: Schwarz and Oldham, pp. 518-526http://inst.EECS.Berkeley.EDU/~ee42/Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Physics of Current Flow, Resistance, ResistivityA voltageV applied across the lengthL of a homogeneous material produces an electric fieldE where E = V/L. LtWVArea A = W X tA currentI flows where I = V/R andThe resistanceR is given by the resistor formula R = ρL/A in which the resistivity, ρ, is inverselyproportional to the concentration of free carriers , N, and the mobilityof those carriers, µ. (µ is often defined by: |drift velocity| = µE = µV/L)In fact ρ = 1/ σ , where the conductivity , σ , is defined by q µ N, in which q is the electronic charge(q = 1.6 x 10-19Coulomb).2Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Physics of Current Flow, Resistance, ResistivityE = V/L. I = V/RLtWVArea A = W X tIR = ρL/A =(1/q µN) L/W tCarriers per unit volumeCarrier mobilityWhere R is the resistance of a “square” of the film. Clearly if L is four times W, then R = 4 R.R = (L/W)/ µQ = L/W R= (L/W) /µ(qNt)But q N t has the dimensions of charge per unit area and represents the charge per unit area in a film of thickness t when the film has N carriers/cm3and is t units thick. Thus we call q N t the “Q” andCopyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Resistance of Silicon Films (at low Efields)So σ = q n µn for electrons in n-type Siand σ = q p µpfor holes in p-type Siat low fields σ = q N µ where N = n or p and µ = µn or µpIn other words R =1/ µΝ(qNDt) = 1/ µΝ(QD) in N-type SiliconWhere (ND t) is the number of donors implanted per unit area, and multiplying by q, we have the donor charge implanted per unit area. (µΝis the mobility of the electrons).Similarly R =1/ µP(qNAt) = 1/ µP(QA) in P-type SiliconWhere (NA t) is the number of acceptors implanted per unit area, and multiplying by q, we have the acceptor charge implanted per unit area.3Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Silicon Resistor Sheet resistivity, R given by:R = [1/(σ t)] =6.25 K Ω/squareExample: 1 µm thick n-type silicon layer which was implanted with 1012donors cm-2. (Thus Nd= 1012/ 10-4= 1016cm-3 ) σ = q n µn = (1.6 x 10-19C) (1016cm-3) (1000 cm2/ Vsec) = 1.6 S/cmρ = 1 / σ = 0.625 Ω cmABRAB= ?RAB= 4 X 6.25 = 25 KΩBut this can be obtained directly from the implant “Q” of 1.6 x 10-19x 1012 = 1.6 x 10-7thus R = [1/(Q µ)] =6.25 K Ω/squareCopyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Charge Transport in SiliconAt low electric fields, the average speed of carriers is proportional to the field with proportionality constant µ; In fact drift velocity = µpE for holes = - µnE for electrons :|<v>| (Km/s)100E (KV/cm)1020Example: µn= 1000 cm2/v-sec, (or 10Km2/KV-sec)µp= 500 cm2/v-sec4Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003Charge Transport in SiliconBut at high electric fields, the average speed of carriers is NOT proportional to the field; that is the mobility concept fails. In fact velocity saturates at 107cm/sec = 100 km/sec for both electrons and holes:<v> (Km/s)100E (KV/cm)1020This saturation is observable directly in the “resistance” of a silicon resistor at high fields (10KV/cm = 1V/µm)IVCopyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003THE “CHARGE CONTROL DEVICE”ORHOW TO MAKE A SMART SWITCHTop surface of semiconductor can have carriers induced by applying voltage to GDConcept:Apply positive voltage to gate with respect to semiconductor. This will induce +Q on gate, −Q on surface of semiconductor. Resistance between D and S will drop.Thus, we can control current from D to S.metal electrodeinsulatorSemiconductor with few carriersmetalmetalLWGStox5Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003MOS TRANSISTOR STRUCTUREDEVICE IN CROSS-SECTION“Metal”“Semiconductor”“Oxide”• In the absence of gate voltage, no current can flow between S and D.• Above a certain gate to source voltage Vt(the “threshold”), electrons are induced at the surface beneath the oxide. (Think of it as a capacitor.) • These electrons can carry current between S and D if a voltage is applied.nPoxide insulatorgaten“Metal” gate (Al or Si)DSGCopyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003CHARGE-CONTROL EXPERIMENT – “THE FIELD EFFECT”VGSQVTAbove some “threshold” voltage VT, the number of electrons per square cm under the gate is proportional to VGS− VT, i.e., the charge QNis proportional to VGS− VT.oxoxtCε=These charge carriers can carry current from D to S, so we can make low resistance (RDS) by making VGS− VTvery large VGSSSioxide+−+−GVDSDi)VV(CQcharge for unit areacapacitance for unit areaonset of charge formation by field effecttox6Copyright 2003, Regents of University of CaliforniaLecture 24: 11/25/03 A.R. NeureutherVersion Date 11/18/03EECS 42 Intro. Digital Electronics Fall 2003I-V CHARACTERISTICS IN THE LOW VDSREGIMEVGSSsemiconductoroxideGVDSiD +−+−Dalways zero!iGVGSConsider first gate current and drain current versus GATE voltageThe
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