1Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003EECS 42 Introduction to Electronics for Computer ScienceAndrew R. NeureutherLecture #3 • Kirchhoff’s Laws• Ideal independent sources• Resistorshttp://inst.EECS.Berkeley.EDU/~ee42/Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003Game Plan 01/22/03Monday 01/27/03 Electrical QuantitiesSchwarz and Oldham: 1.3-1.4Today 01/29/03 Kirchhoff LawsSchwarz and Oldham: 2.1-2.2Next (3rd) Week Capacitors, inductors, I vs. VSchwarz and Oldham: 5.1, 2.2, 3.1 Power and EnergySchwarz and Oldham: 5.1, 2.2, 3.1Problem Set #2 – Out 1/27/03 - Due 2/5/03 2:30 in box in 240 Cory2.1 Flow; 2.2 KCL; 2.3 KVL; 2.4 resistor circuit; 2.5 PowerCopyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003BRANCHES AND NODESCircuit with several branches connected at a node: branch (circuit element)3i2i4i1i(Sum of currents entering node) − (Sum of currents leaving node) = 0q = charge stored at node is zero. If charge is stored, for example in a capacitor, then the capacitor is a branch and the charge is stored there NOT at the node. KIRCHOFF’s CURRENT LAW “KCL”: (see Text 1.2 and 1.3)Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003Capacitor at a Node Circuit with several branches, including a capacitor3i2i4i1i(Sum of currents entering node) − (Sum of currents leaving node) = 0q = charge stored at node is zero. If charge is stored, for example in the capacitor shown as branch 3, the charge is accounted for as the time-integral of i3. Thus the charge is not over at the node; it is on the capacitor.Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003Suppose imbalance in currents is 1µA = 1 µC/s (net current entering node)Assuming that q = 0 at t = 0, the charge increase is 10−6C each second or charge carriers each second WHAT IF THE NET CURRENT WERE NOT ZERO?12196106106.1/10 ×=×−−But by definition, the capacitance of a node to ground is ZERO because we show any capacitance as an explicit circuit element (branch). Thus, the voltage would be infinite (Q = CV).Something has to give! In the limit of zero capacitance the accumulation of charge would result in infinite electric fields … there would be a spark as the air around the node broke down.Charge is transported around the circuit branches (even stored in some branches), but it doesn’t pile up at the nodes!Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003SIGN CONVENTIONS FOR SUMMING CURRENTS Kirchhoff’s Current Law (KCL) Sum of currents entering node = sum of currents leaving nodeUse reference directionsto determine “entering” and “leaving” currents … no concernabout actual polarities Alternative statements of KCL1 “Algebraic sum” of currents enteringnode = 0where “algebraic sum” means currents leaving are included with a minus sign2 “Algebraic sum” of currents leaving node = 0where currents entering are included with a minus sign) KCL yields one equation per node2Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003KIRCHHOFF’S CURRENT LAW EXAMPLECurrents entering the node: 24 µACurrents leaving the node: −4 µA + 10 µA + i Three statements of KCLA 18i 0i10424 0iA 18i 0i10)4(24 0iA 18i i10424 iiALLALLIN OUToutinoutinµµµ=⇒=++−−==⇒=−−−−==⇒++−==∑∑∑∑EQUIVALENT i 10 µA 24 µA -4 µA24 = 10 + (−4) + ii = 18 µA}Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003GENERALIZATION OF KCL TO SURFACESSum of currents entering and leaving any “black box” is zeroCould be a big chunk of circuit in here, e.g., could be a “Black Box”In other words there can be lots of nodes and branches inside the box.Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003KIRCHHOFF’S CURRENT LAW USING SURFACESExampleiA 2A 5 =+∴µµentering leaving5 µA2 µAi = ?surfacei must be 50 mA50 mAi?Another examplei=7µACopyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003Example of the use of KCLR1R2V1X+-At node X:Current into X from the left:(V1-vX)/R1Current out of X to the right:vX/R2KCL:(V1-vX)/R1 = vX/R2Given V1, This equation can be solved for vXOf course we just get the same result as we obtained from our series resistor formulation. (Find the current and multiply by R2)vX= V1R2 /(R1 + R2)Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003BRANCH AND NODE VOLTAGESThe voltage across a circuit element is defined as the difference between the node voltages at its terminalsSpecifying node voltages: Use one node as the implicit reference(the “common” node … attach special symbol to label it)Now single subscripts can label voltages:e.g., vbmeans vb− ve, vameans va− ve, etc.cev2v1dab+−−+0ve≡(since it’s the reference)ad2vvv −=select as ref. ⇒ “ground”Copyright 2001, Regents of University of CaliforniaLecture 3: 01/27/03 A.R. NeureutherVersion Date 01/30/03EECS 42 Intro. electronics for CS Spring 2003KIRCHHOFF’S VOLTAGE LAW (KVL)The algebraic sum of the “voltage drops” around any “closed loop” is zero.Voltage drop→ defined as the branch voltage if the + sign is encountered first; it is (-) the branch voltage if the − sign is encountered first … important bookkeepingWhy? We must return to the same potential (conservation of energy).+-V2Path“rise” or “step up”(negative drop)+-V1Path“drop”Closed loop: Path beginning and ending on the same node3Copyright 2001,
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