1Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003EECS 42 Introduction Digital ElectronicsAndrew R. NeureutherLecture # 17 Logic with Complementary DevicesS&O pp. 607-611 (read for graphs and not physics or equations), plus Handout of Wed Lectures. A)Discovering a Pull-Up Device B) Designing a Pull-Up DeviceC) EE 42 Pull-Up Device Model (42S_PMOS)D) Composite IOUTvs. VOUTE) Voltage Transfer Function and VMIDhttp://inst.EECS.Berkeley.EDU/~ee42/These viewgraphs will be handed out in class.Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Problems and Opportunities in Logic Circuit DesignProblem #1: Significant wasted current and power when VOUTis low.Problem #2: High value of VOUTis adversely affected by a load resistor.Missed Opportunity: The value of the input control signal is not used to adjust the state of the pull-up device.What if : If the pull-up device could be a state-dependent device what kind of device would we want?Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Pull-Up Device Design: Graphical Trial #1VOUT(V)035VIN=0 & 1IOUT(µA)2060100VIN = 3VIN= 5VIN = 3VIN=0 & 1VIN=5Problem #1 is worse!There is even more wasted current and power than before when VOUTis low because both devices are on at the same time.Look for a more Complementary approach.Similar pull-up and pull-down statesCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Pull-Up Device Design: Trial 2VOUT(V)035VIN= 0 & 1IOUT(µA)2060100VIN = 3State 1VIN = 3VIN=5VIN=0Complementary pull-up and pull-down statesProblem #1 is solved.There is essentially no wasted current or power when VOUTis low.Note that in the pull-down case the current increases with the state number and in the pull-up case it decreases.Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Input for State Control SignalPull-Down and Pull-Up Must Complement Rather Than Fight Each OtherInput for State Control SignalShare Same SignalReduce the Short-Circuit Current by making either one or the other device off.Pull-DownVOUTIOUTOutputVINVDDPull-UpVINDischarging CurrentCharging CurrentCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Desirable Complementary Device CharacteristicsVDDVOUTIOUTOutputVINWe desire characteristics that are complementary for the pull-down and pull-up state-dependent devices.Low not leakHighCharge OutputPull-Up CurrentHigh Discharge OutputLow not leakPull-DownCurrentHighLowVIN2Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Designing the Complementary DeviceMake ThisInto ThisVOUT(V)035VIN=0IOUT(µA)2060100VIN = 3VIN= 5VOUT(V)035VIN= 5IOUT(µA)2060100VIN = 3VIN=0 The creation of current with input State (VIN) is reverse ordered (and also shifted).The dependence on VOUTis reversed in sign and shifted by VDDThe curve sets are very similar but have two key changes.VDDCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Pull-Up Can be viewed as Complementary by using Device rather than Circuit voltagesVDD-VXV’OUT = VDD-VOUTPull-DownIOUTOutputVINVDDPull-UpVINV’IN = VDD-VINV’IN = VDD-VINV’OUT = VDD-VOUTReverseShiftCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Saturation Current NMOS ModelCurrent IOUTonly flows when VINis larger than the threshold value VTDand the current is proportional to VOUTup to VOUT-SAT-Dwhere it reaches the saturation current()DSATOUTTDINDDSATOUTVVVkI−−−−−=VOUT(V)IOUT(µA)0352060100State 3 VIN= 3VLinear (with VOUT)Saturation (with VOUT)Example:kD= 25 µA/V2VTD= 1VVOUT-SAT-D= 1V()AVVVVAIPDSATOUTµµ50113252=−=−−Note that we have added an extra parameter to distinguish between threshold (VTD) and saturation (VOUT-SAT-D).Use these values in the homework.Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Saturation Current 42S_PMOS ModelCurrent IOUTonly flows when VINis smaller than VDDby the threshold value VTU(that is VDD-VIN> VTU) and the current is proportional to the excess gate voltage (VDD-VIN- VTU)and is also proportional to (VDD -VOUT) above (VDD-VOUT-SAT-U) where it has its maximum saturated value.()USATOUTTUINDDUUSATOUTVVVVkI−−−−−−=Example:kU= 20 µA/V2VTU= 1VVOUT-SAT-U= 1V()AVVVVVAIUSATOUTµµ201135202=−−=−−Linear (with VOUT)VOUT(V)IOUT(µA)0352060100State 3 VIN= 3VSaturation (with VOUT)Use these values in the homework.VDD-VOUT-SAT-UCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 200342S_PMOS Pull-UP Device Curves IOUTvs. VOUTVOUT(V)035VIN= 5, 4IOUT(µA)2060100VIN = 3VIN=0 Evaluating the current when VOUT= VDD–VOUT-SAT-Ufor a given VINallows the entire curve to be sketchedCopyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Transistor Inverter ExampleIt may be simpler to just think of PMOS and NMOS transistors instead of a general 3 terminal pull-up or pull-down devices or networks.VIN-DPull-Down NetworkVOUTIOUTOutputVDDPull-Up NetworkVIN-UVIN-DVIN-UVOUTIOUTOutputVDDp-type MOSTransistor(PMOS)n-type MOSTransistor(NMOS)3Copyright 2003, Regents of University of CaliforniaLecture 17: 10/23/03 A.R. NeureutherVersion Date 10/18/03EECS 42 Intro. Digital Electronics, Fall 2003Case #1: VIN= VDD = 5VThe Output is Pulled-DownVOUTIOUTOutputVIN-DVDDVIN-Up-type MOSTransistor(PMOS)n-type MOSTransistor(NMOS)VIN= VDD= 5VThe PMOS transistor is OFF when VIN> VDD-VTUThe NMOS transistor is ON when VIN>
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