PowerPoint PresentationSlide 2Interconnect layersMOS Fabrication and LAYOUTSlide 5Patterning the Layers - LithographyExposure ProcessReview Exposure ProcessPhotoresist Development and EtchingSlide 10Basic CMOS InverterSlide 12Data Synchronization problemCombinatorial vs Sequential logicCombinatorialdynamic circuitSlide 17Unpredictability of dynamic circuitsRepresenting a Discrete Sequence in Continuous TimeMaking time discretesequential circuitDynamic LatchLatchesFeedback Can Provide Memorythe Opposite StateSet/ResetSet/Reset flip-flopSet/Reset flip-flop with clockSlide 29Two phase latchesAsynchronous vs. clocked logicClocked logic11/8/2004 EE 42 fall 2004 lecture 29 1Lecture #29 CMOS fabrication, clocked and latched circuits•Last lecture: PMOS–Physical structure–CMOS–Dynamic circuits (Ring oscillators)•This lecture: –CMOS fabrication–Clocked and latched circuits11/8/2004 EE 42 fall 2004 lecture 29 2CMOS PARAMETERS3 generations of CMOS ReturnParameter NMOS PMOS NMOS PMOS NMOS PMOS (0.25m) (0.25m) (0.18m) (0.18m) (0.13m) (0.13m) L (m) 0.25 0.25 0.18 0.18 0.13 0.13 IDS’ (A/[V-m]) 350 -175 500 - 250 650 - 325 V-10.05 0.05 0.07 0.07 0.1 0.1 VT V) 0.5 - 0.5 0.4 - 0.4 0.4 - 0.4 VDSAT V) 1 -1 0.75 - 0.75 0.6 - 0.6 dOX nm) 5 5 3.5 3.5 2.5 2.5 CGS ‘fF/m2) 7 7 10 10 14 14 VDD V) 2.5 2.5 1.8 1.8 1.5 1.511/8/2004 EE 42 fall 2004 lecture 29 3Interconnect layers•On top of the transistor layers, many metal layers interconnect the logicIllustrationActual TEM photo11/8/2004 EE 42 fall 2004 lecture 29 4MOS Fabrication and LAYOUTThick oxide on siliconThin oxideGate (over oxide)Drain contactSource contactDevice dimensions are larger than gate dimensionsGate Length = LGate Width = WLW11/8/2004 EE 42 fall 2004 lecture 29 5Integrated Circuit FabricationGoal: Mass fabrication (i.e. simultaneous fabrication) of hundreds of “Chips”, each a circuit (such as a microprocessor or memory chip) containing millions of transistorsMethod: Lay down thin films of semiconductors, metals and insulators and pattern each layer with a process much like printing (lithography).Minimum set of materials in an integrated circuit• Si substrate• SiO2 insulator• Polysilicon gate• Metal contacts and wiringOther materials generally used (but not discussed here)Tungsten metal, Silicon nitride insulator, TiN and TiSi conductor regions11/8/2004 EE 42 fall 2004 lecture 29 6Patterning the Layers - Lithography Scheme: Subtractive Patterning … that means for example deposit a uniform film of Aluminum and then selectively remove it (etch it away) where you don’t want it. Process for applying the pattern: PhotolithographyHow Photolithography works: –Coat the the uniform film to be etched with a photosensitive material–Expose the photosensitive material with a “picture” of the desired pattern (much like photographic printing)–Develop away the exposed areas–Use the resulting pattern to mask the etching of the underlying film.Goal: Transfer the desired pattern information to the wafer(for example the geometry of a wire)11/8/2004 EE 42 fall 2004 lecture 29 7Exposure ProcessA glass mask with a black/clear pattern is used to expose a wafer coated with about 1 m of photoresist (image projected with optical system)MaskLensImage of mask will appear hereWe will shine UV light onto mask Si waferphotoresistoxide11/8/2004 EE 42 fall 2004 lecture 29 8Review Exposure Process•A glass mask with a black/clear pattern is used to expose a wafer coated with about 1 m of photoresistAreas exposed to UV light are susceptible to being chemically removed (developed) MaskLensImage of mask will appear here (3 dark areas, 4 light areas)photoresistwaferoxideUV light11/8/2004 EE 42 fall 2004 lecture 29 9Photoresist Development and Etching•Solutions with high pH dissolve the areas exposed to UV; unexposed areas (under the black patterns) are not dissolvedoxide layerAfter etching the oxideAfter developing the photoresist Developed photoresistoxide layerExposed areas ofphotoresistoxide layer11/8/2004 EE 42 fall 2004 lecture 29 10CMOSoxideP-Si n-wellp p n nGDGDSS11/8/2004 EE 42 fall 2004 lecture 29 11Basic CMOS InverterInverterINOUTVDDp-chVDDOUTINn-chCMOS InverterGROUNDINOUTVDDN-WELLNMOS GatePMOS GateAl “wires”GROUNDINOUTVDDN-WELLNMOS GatePMOS GateAl “wires”Example layout of CMOS Inverter11/8/2004 EE 42 fall 2004 lecture 29 12GROUNDIN OUTVDDN-WELLNMOS GatePMOS GateAl “wires”11/8/2004 EE 42 fall 2004 lecture 29 13Data Synchronization problem•Combinatorial logic gates can give incorrect answers prematurely and may take several gate propagation delays produce an answer.• Clocks (signals as to when to proceed) and latches (which capture and hold the correct outputs) can provide synchronization.11/8/2004 EE 42 fall 2004 lecture 29 14Combinatorial vs Sequential logic•In the digital circuits we have created so far, the output was a function only of the instantaneous inputs. –combinational logic circuits.•If the action of circuits depends on the history of the inputs, or on past operations, they are–sequential logic circuits.11/8/2004 EE 42 fall 2004 lecture 29 15Combinatorial•A combinatorial circuit can be schematically represented as a black box, and is completely described by a truth table of the outputs as a function of the current inputs11/8/2004 EE 42 fall 2004 lecture 29 16dynamic circuit•the output is a function not only of the current inputs, but of the internal state of the circuits, residual from previous inputs. The circuit can not be described by a truth table of the inputs only.ABCOutputs11/8/2004 EE 42 fall 2004 lecture 29 17Ring oscillator as an example of a dynamic circuitVoutSTAGE 1VDDSTAGE 101 At at time equal to exactly 1001 gate delays, the input to stage 1 will go high, and after another equal time it will go low, etc. This is a “RING OSCILLATOR”, which toggles at a frequency equal to 1/(1001 delay ). Such ring oscillators are commonly used to estimate the performance of a technology. No switch is actually needed, the output is permanently wired to the input, and the oscillations start when power is applied.11/8/2004 EE 42 fall 2004 lecture 29 18Unpredictability of dynamic circuits•In the case of the ring oscillator, the output just oscillates forever without regard to its inputs.•If
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