ECE 448 Lecture 21 FPGA Platforms High Level Language HLL Design Flows ECE 448 FPGA and ASIC Design with VHDL George Mason University Resources USB http en wikipedia org wiki USB PCI http en wikipedia org wiki PCI Local Bus PCI X http en wikipedia org wiki PCI X PCIe http en wikipedia org wiki PCI Express ECE 448 FPGA and ASIC Design with VHDL 2 Resources Clive Max Maxfield The Design Warrior s Guide to FPGAs Chapter 11 C C etc Based Design Flows Reconfigurable Supercomputing T El Ghazawi K Gaj D Buell D Pointer Tutorial at the Supercomputing 2005 conference http hpcl seas gwu edu openfpga tutorial html index html ECE 448 FPGA and ASIC Design with VHDL 3 FPGA Device Capacity Trends Virtex 5 550 MHz 24M gates Xilinx Device Complexity Virtex II Pro 450 MHz 8M gates Virtex II 450 MHz 8M gates Virtex E 240 MHz 4M gates Virtex 200 MHz 1M gates XC4000 100 MHz 250K gates XC2000 50 MHz 1K gates XC3000 85 MHz 7 5K gates 1985 1987 1991 XC5200 50 MHz 23K gates 1995 Spartan 3 326 MHz 5M gates Spartan II 200 MHz 200K gates 1998 1999 2000 2002 2003 2004 Year ECE 448 FPGA and ASIC Design with VHDL Spartan 80 MHz 40K gates Virtex 4 500 MHz 16M gates 2006 Source http class ece iastate edu cpre583 lectures Lect 01 ppt 4 Prices of the most recent families of Xilinx FPGAs Low cost High performance Spartan 3 130 Virtex II Virtex II Pro 3 000 Spartan 3E 35 Virtex 4 Virtex 5 3 000 approximate cost of the largest device per unit for a batch of 10 000 units ECE 448 FPGA and ASIC Design with VHDL 5 FPGA families Low cost Xilinx Altera High performance Spartan 3 Virtex 4 LX SX FX Spartan 3E Virtex 5 LX LXT SXT FXT Spartan 3A Virtex 6 Spartan 3AN Spartan 3A DSP Spartan 6 Cyclone II Cyclone III Aria Stratix II Aria II Stratix II GX Stratix III L E Stratix IV E GX GT ECE 448 FPGA and ASIC Design with VHDL 6 Virtex 4 Source Xilinx Inc ECE 448 FPGA and ASIC Design with VHDL 7 Virtex 5 Family Platforms ECE 448 FPGA and ASIC Design with VHDL 8 FPGA Boards ECE 448 FPGA and ASIC Design with VHDL George Mason University General Architecture of an FPGA Based Board CLK I O CARD Processing Element PE 0 Processing Element PE 1 Processing Element PE N 1 BUS LOCAL MEMORY LOCAL MEMORY LOCAL MEMORY BUS INTERFACE CONTROLLER COMMON MEMORY INTERCONNECT NETWORK ECE 448 FPGA and ASIC Design with VHDL 10 Reconfigurable Computing Boards Boards may have one or several interconnected FPGA chips Support different bus standards e g PCI PCI X PCIe USB etc May have direct real time data I O through a daughter board Boards may have local onboard memory OBM to handle large data while avoiding the system bus e g PCI bottleneck ECE 448 FPGA and ASIC Design with VHDL 11 Reconfigurable Computing Boards Many boards per node can be supported Host program e g C to interface user and P with a board via the board s API Driver API functions may include functionalities such as Reset Open Close Set Clocks DMA Read Write Download Configurations Interrupt Readback ECE 448 FPGA and ASIC Design with VHDL 12 Universal Serial Bus USB It supports three data rates Full speed rate of 1 5 MB s as defined by USB 1 0 Low speed rate of 1 5 Mb s which is also defined by USB 1 0 Very similar to full speed operation except that it takes each bit 8 times as long to transmit Devices that run on the low speed rate are Keyboards Mice and Joysticks High speed rate of 60 MB s as defined by USB 2 0 13 Digilent BASYS FPGA Price 59 69 Interfaces USB port Memory XCF02 Platform Flash ROM Ethernet None Configuration Device configuration through JTAG via JTAG3 parallel cable or through USB using Digilent Adept Suite software Applications Academic purposes as a teaching aid in digital logic design courses URL http www digilentinc com Products Detail cfm Spartan 3E XC 3S100E 3S250E in TQ144 Prod BASYS Nav1 Products Nav2 Programmable Digilent Spartan3E starter board FPGA Spartan 3E XC3S500E Price 149 Interfaces USB3 port Memory XCF04 Platform Flash for storing FPGA configurations 16 Mb Serial Flash 128 Mb Strata Flash 256 Mb DDR SDRAM Ethernet Configuration JTAG programming via on board USB3 port JTAG and SPI Flash programming with parallel or JTAG USB cable Applications General Prototyping URL http www digilentinc com Products Detail cfm 10 100 Ethernet PHY Prod S3EBOARD Nav1 Products Nav2 Programmable Xilinx Spartan3A starter kit FPGA Spartan 3A XC3S700A FG484 Price 189 Interfaces JTAG USB download board Memory 256MB DDR2 SDRAM 32 Mb parallel Flash 4 Mb Platform Flash PROM 2 16 Mb SPI Flash devices Ethernet Configuration Configuration via JTAG using USB port Platform Flash PROM or SPI Flash Memory Applications General Prototyping URL http www xilinx com products devkits HW SPAR3A SK UNI G htm 10 100 Ethernet PHY Common Interface PCI PCI Peripheral Component Interconnect 32 bit bus ECE 448 FPGA and ASIC Design with VHDL 64 bit bus 17 Evolution of the PCI Interface ECE 448 FPGA and ASIC Design with VHDL 18 Disadvantages of PCI PCI X Fixed Bus width which all the PCI devices in the system share No data prioritization Important data could get caught in the bottleneck Interference and signal degradation common in parallel connections Poor materials and cross over signal from nearby wires translates into noise which slows the connection down PCI Express PCIe Not a bus like PCI or PCI X Communication based on the concept of lanes A serial bi directional point to point connection is known as a lane Full duplex bi directional lanes Transfer rate of a single Lane is a single bit cycle in each direction Different PCI lane configurations x1 x2 x4 x8 x16 x32 Prioritization of data which allows the system to move the most important data first and helps prevent bottlenecks Improvements in the physical materials used to make the connections Better handshaking and error detection Better methods for breaking data into packets and putting the packets together again Xilinx Virtex 5 LXT SXT FXT ML50x Evaluation Platform FPGA Virtex 5 LXT SXT FXT LX50T SX50T FX70T 1FFG1136 Price 1 195 Interfaces x1 PCI Express SFP SMA SATA connectors Memory DDR2 SODIMM 256 MB 1 MB SRAM 32 MB Linear Flash Ethernet Configuration Through on board System ACE controller or PROM or Linear Flash or SPI Flash Memory Can also be downloaded via JTAG through Xilinx download cable Applications High speed design DSP Embedded design Image processing etc URL http www xilinx com products devkits HW V5 ML505 UNI G htm x1 Tri mode Ethernet port Xilinx Virtex 5 FXT ML510 Embedded Development Platform FPGA Virtex 5 FXT XC5VFX130T
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