Final ExamSpring 2007May 10, 2007(25 points)Part II (open books, open notes)(1 hr 45 minutes, 5 questions, 2x5+3x2.5 pt, 17.5 points)Problem 1 (5 points)Draw a block diagram of the execution unit of a circuit capable of storing a set of 32 8-bitunsigned integers in an internal memory, and then computing the largest and the second largestnumber in this set and their respective positions within the set.The circuit should be able to execute the following pseudocode, and should be optimized forminimum latency (i.e., execute as many operations as possible in parallel):while (s=0)initialize internal memory MEMend whilelargest = 0second_largest = 0largest_pos = 0second_largest_pos = 0for i=0 to 31 doif MEM[i] >= largest thensecond_largest = largestsecond_largest_pos = largest_poslargest = MEM[i]largest_pos = iend ifif (MEM[i] < largest) and (MEM[i] >= second_largest) thensecond_largest = MEM[i]second_largest_pos = iend ifend forAssume the following interface to your circuit:Port Width Meaningclk 1 System clockResetn 1 System reset – clears internal registers. Active low.DataIn 8 Input data busRAdd 5 Address of the internal memory MEM where input data isstoredWrInit 1 Synchronous write control signals 1 Operating mode: 0 = initialization, 1 = computations.Rd 1 Read enable. 0 = high impedance on all output buses, 1 = validoutputs.largest 8 Largest number in the input setsecond_largest 8 Second largest number in the input setlargest_pos 5 Position of the largest number in the input setsecond_largest_pos 5 Position of the second largest number in the input setDone 1 Asserted when all results are ready, zero otherwise.Problem 2 (5 points)1. Draw an interface to the execution unit and control unit from Problem 1.2. Draw an ASM chart corresponding to the pseudocode from Problem 1.3. Express all operations in your ASM chart in terms of active values of control signalsgenerated as outputs of the control unit and used as inputs in the execution unit.Problem 3 (2.5 points)For the given below circuit implementing sorting of four n-bit numbers, determine values of allcontrol signals listed in the table during the execution of the instructions given in the first columnof the table. Values in the last four columns should correspond to the values of the correspondingsignals before the instruction takes effect, and may be marked as UN (“unknown”). Clearlydistinguish between a “don’t care” (“-“) value and an “inactive” (“0”) value of the control signals.Instruction WrInit Wr Rd Int Csel Ain Bin LI EI LJ EJ RAdd Imux Ci CjR3 DataIni 0i i+1A R0B R1R2 BR3 Aj ij j+1DataOut R2E E E EClockDataInWrInitRin3Rin2Rin1Rin0E EBinAinDataOutRdABDataImuxBoutBltA1 0A B0 1RDataR0R1R2R30 1 2 3ABmuxnnnE E E EClockDataInWrInitRin3Rin2Rin1Rin0E EBinAinDataOutRdABDataImuxBoutBltA1 0A B0 1RDataR0R1R2R30 1 2 3ABmuxnnnLELE1010k 2–=k –1=LJEJLIEI2-to-4 decoderWrInitWrRAddClockCselIntImux2CiCjzizjCmuxRin0Rin1Rin2Rin3022222Counter CounterRQQRw0w1Eny0y1y2y32LELE1010k 2–=k –1=LJEJLIEI2-to-4 decoderWrInitWrRAddClockCselIntImux2CiCjzizjCmuxRin0Rin1Rin2Rin3022222Counter CounterRQQRw0w1Eny0y1y2y32Assume that after the initialization the circuit performs the following pseudocode:fori = 0tok 2doA = Ri;forj = i + 1tok 1doB = Rj;ifB < AthenRi= B;Rj= A;A = Ri;end if ;end for;end for;––fori = 0tok 2doA = Ri;forj = i + 1tok 1doB = Rj;ifB < AthenRi= B;Rj= A;A = Ri;end if ;end for;end for;––Problem 4 (2.5 points)Translate the following block diagram to RTL VHDL, assuming that a generic memoryand a generic register have been already defined for you in separate files. Describe theremaining components using dataflow design style. Provide the complete entity andarchitecture, including the component declarations.Problem 5 (2.5 points)Modify the code of the File I/O testbench provided in your answer sheet, in such a way that it canverify the operation of a multiplier accumulator that computes a sum of 256 products Xi*Yi.Assume that each multiplication takes 16 clock cycles to execute, and an addition takes two clockcycles to execute.Port Width MeaningXi 16 Operand XiYi 16 Operand Yiclk 1 Clockreset 1 Resetload 1 Load operandsS 40 Output SAssume the following format of an input file:load reset X Yload reset X0 Y0load reset X1 Y1…….load reset X255 Y255expected_sumAssume that Xi, Yi, and expected sum S are provided in the hexadecimal notation, and that thefirst line of the input file is used to reset the internal
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