1Accepted for publication in IEEE Transactions on CAD/ICAS Failing Vector Identification Based on Overlapping Intervals of Test Vectors in a Scan-BIST Environment∗ Chunsheng Liu and Krishnendu Chakrabarty Department of Electrical & Computer Engineering Duke University 130 Hudson Hall, Box 90291 Durham, NC 27708 Contact author: Krishnendu Chakrabarty Phone: (919)660-5244, Fax: (919)660-5293 Email: [email protected] ABSTRACT We present a new scan-BIST approach for determining failing vectors for fault diagnosis. This approach is based on the application of overlapping intervals of test vectors to the circuit under test, and it is especially suitable for faults that are detected by a relatively small number of pseudorandom test patterns. Two MISRs are used in an interleaved fashion to generate intermediate signatures, thereby obviating the need for multiple test sessions. The knowledge of failing and fault-free intervals is used to obtain a set S of candidate failing vectors that includes all the actual (true) failing vectors. We propose a signature analysis method based on overlapping sections and the principle of superposition to effectively prune the candidate set. We present analytical results to determine an appropriate interval length and the degree of overlap, as well as upper and lower bounds on the size of S. We also determine a lower bound on the number of true failing vectors through a simple graph model. Finally, we present experimental results for the ISCAS-89 benchmark circuits to demonstrate the effectiveness of the proposed scan-BIST diagnosis approach. Keywords: Candidate vector set, diagnostic resolution, fault diagnosis, signature analysis, superposition. .This research was supported in part by the National Science Foundation under grants CCR-9875324 and CCR-0204077.21 Introduction As process technologies shrink and designs become more complex, built-in self-test (BIST) is gaining increasing acceptance as an industry-wide test solution [1]. In particular, the combination of scan design and BIST, commonly referred to as scan-BIST, is now especially common [2]. Scan-BIST techniques typically apply a large number of patterns from a pseudorandom pattern generator (PRPG) to the circuit under test (CUT) via scan chains. The test responses are then captured by the scan chain and a compact signature is generated using a multiple-input signature register (MISR); see Figure 1. However, a problem with this approach is that the signature provided by the MISR does not contain enough diagnostic information, either to identify failing vectors or to precisely identify error-capturing scan cells. The pass/fail information obtained from the MISR at the end of the test session is usually insufficient to diagnose the failure via effect-cause analysis. Fault diagnosis is essential for the identification of manufacturing defects and for yield learning. The cost of diagnosis is proportional to the time required for failure analysis, which can be extremely high for a scan-BIST scheme involving tens of thousands or millions of vectors [3]. Therefore, there is a pressing need for BIST schemes that provide adequate diagnostic information, without burdening the failure analysis process with superfluous information. The diagnostic information in scan-BIST can be classified as space information and time information, respectively. The former refers to the set of scan cells that capture errors during the BIST session. This problem has received a lot of attention recently, and a number of methods involving scan chain partitioning with multiple test sessions have been proposed for precisely identifying the failing scan cells [4-7]. A more difficult problem in scan-BIST diagnosis is that of identifying the set of failing vectors. This is because the length of a scan chain in a typical BIST scheme is usually much smaller than the number of test vectors applied to the CUT. As a result, fewer practical techniques are available today for rapidly identifying a small set of candidate failing vectors. Early work on failing vector identification was based on the analysis of LFSR sequences [8], the use of cycling registers [9], and error-correcting codes [10,11]. An alternative approach that does not require intermediate signatures was presented in [12]. These techniques suffer from the drawback of limitations on error multiplicity [8], diagnostic aliasing [9,10,11], and high overhead [10,12]. Recently, a method based on the combination of cycling registers and pruning techniques was proposed for failing vector identification [13]. While this approach is useful in narrowing down the set of candidate failing vectors, it suffers from the3drawback that it does not identify all the failing vectors. In this paper, we present a technique for failing vector identification based on the use of overlapping intervals of test vectors and the principle of superposition. This approach is especially suitable for diagnosing faults that are detected by a small number of pseudorandom patterns, i.e., have relatively low detection probability. An interval is a set of consecutive test vectors. An advantage of this approach is that all failing vectors are included in a reduced set of candidate vectors for failure analysis. Unlike the approach based on test windows [18], where test vectors are partitioned into non-overlapping segments, our method is based on overlapping intervals of test vectors. In combination with a novel pruning procedure, the overlap allows us to prune the set of candidate failing vectors more efficiently. An interval that does not contain a failing vector can be omitted from the set of candidate failing vectors. The overlap ensures that if a failing interval I1 is followed by a non-failing interval I2, only the set difference I1 – I2 needs to be retained in the set of candidate failing vectors. As an enhancement to the basic interval method proposed in [19], we show here that interval overlap also allows us to use a simple yet efficient signature analysis technique based on superposition that can significantly prune the candidate set. This pruning method does not require any additional information. In order to reduce the candidate set further, post-processing procedures can be performed as optional steps [19], which require additional signatures. The proposed interval-based approach also