ECE 269 VLSI System Testing Krish Chakrabarty Lecture 12 Sequential Circuit ATPG 2 Krish Chakrabarty ECE 269 1 Introduction Gate level test generation Topological analysis methods Simulation based Genetic algorithms Test compaction Static compaction Dynamic compaction High level test generation ECE 269 Krish Chakrabarty 2 1 Extended D Algorithm Start with time frame 0 Propagate error to primary output by forward time processing Justify state by reverse time processing s a 0 s a 0 1 1 x1 x2 0 y x1 s a 0 D x1 1 x2 D y 0 1 x2 0 y z 0 z Time frame 1 D Time frame 0 z Time frame 1 Test sequence x1 x2 X 0 1 1 X 1 Krish Chakrabarty ECE 269 9 Valued Logic s a 0 s a 0 Contradiction x1 x1 D 1 0 z 0 1 3 1 D 1 0 x2 x2 5 valued logic z 0 1 y Time frame 1 x1 1 X Test found s a 0 x1 z 0 X 1 X x2 Time frame 0 y 1 0 s a 0 0 1 0 X 1 X z 1 1 0 X x2 y Time frame 1 ECE 269 1 X y Krish Chakrabarty 9 valued logic 1 0 0 X Time frame 0 4 2 State Justification Decision Tree An example with two flip flops Start Goal Make all state variables X 0 1 y1 y2 Untried alternatives X 1 Already visited Stop 0 1 SUCCESS Stop X X Keep track of states already visited 1 1 Untried alternatives Krish Chakrabarty ECE 269 5 Simulation Based ATPG Motivation Difficulties with time frame method Long initialization sequence Impossible initialization with three valued logic Section 5 3 4 Circuit modeling limitations Timing problems tests can cause races hazards High complexity Inadequacy for asynchronous circuits Advantages of simulation based methods ECE 269 Advanced fault simulation technology Accurate simulation model exists for verification Variety of tests functional heuristic random Used since early 1960s Krish Chakrabarty 6 3 Simulation Based ATPG Genetic algorithms Advantages less CPU time than ILA model methods Disadvantages cannot identify undetectable faults longer test sequences Biologically inspired Initial population test sequences perform selection mutation and crossover operations Fitness function used Challenge How to determine fitness function Krish Chakrabarty ECE 269 7 Using Fault Simulator Vector source Generate new trial vectors Functional test bench Heuristic walking 1 etc Weighted random random No Trial vectors Stopping Yes criteria fault coverage CPU time limit etc satisfied Stop ECE 269 No Fault simulator Fault list Restore circuit state New faults detected Krish Chakrabarty Yes Update fault list Append vectors Test vectors 8 4
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