ECE 269 VLSI System Testing Krish Chakrabarty Lecture 2 Test Process and Equipment Krish Chakrabarty ECE 269 1 Lecture 2 VLSI Testing Process and Equipment ECE 269 Motivation Types of Testing Test Specifications and Plan Test Programming Test Data Analysis Automatic Test Equipment Parametric Testing Summary Krish Chakrabarty 2 1 Motivation Need to understand some Automatic Test Equipment ATE technology Influences what tests are possible Serious analog measurement limitations at high digital frequency or in the analog domain Need to understand capabilities for digital logic memory and analog test in System on a Chip SOC technology Need to understand parametric testing Used to take setup hold time measurements Use to compute VIL VIH VOL VOH tr tf td IOL IOH IIL IIH ECE 269 Krish Chakrabarty 3 Types of Testing Verification testing characterization testing or design debug Verifies correctness of design and of test procedure usually requires correction to design Manufacturing testing Factory testing of all manufactured chips for parametric faults and for random defects Acceptance testing incoming inspection User customer tests purchased parts to ensure quality ECE 269 Krish Chakrabarty 4 2 Testing Principle ECE 269 Krish Chakrabarty 5 Automatic Test Equipment Components Consists of Powerful computer Powerful 32 bit Digital Signal Processor DSP for analog testing Test Program written in high level language running on the computer Probe Head actually touches the bare or packaged chip to perform fault detection experiments Probe Card or Membrane Probe contains electronics to measure signals on chip pin or pad ECE 269 Krish Chakrabarty 6 3 Characterization Test Worst case test Choose test that passes fails chips Select statistically significant sample of chips Repeat test for every combination of 2 environmental variables Plot results in Schmoo plot Diagnose and correct design errors Continue throughout production life of chips to improve design and process to increase yield ECE 269 Krish Chakrabarty 7 Schmoo Plot ECE 269 Krish Chakrabarty 8 4 Manufacturing Test Determines whether manufactured chip meets specs Must cover high of modeled faults Must minimize test time to control cost No fault diagnosis Tests every device on chip Test at speed of application or speed guaranteed by supplier Krish Chakrabarty ECE 269 9 Burn in or Stress Test Process Subject chips to high temperature over voltage supply while running production tests Catches Infant mortality cases these are damaged chips that will fail in the first few days of operation causes bad devices to actually fail before chips are shipped to customers Freak failures ECE 269 Krish Chakrabarty 10 5 Types of Manufacturing Tests Wafer sort or probe test done before wafer is scribed and cut into chips Includes test site characterization specific test devices are checked with specific patterns to measure Gate threshold Polysilicon field threshold Poly sheet resistance etc Packaged device tests ECE 269 Krish Chakrabarty 11 Sub types of Tests Parametric measures electrical properties of pin electronics delay voltages currents etc fast and cheap Functional used to cover very high of modeled faults test every transistor and wire in digital circuits long and expensive ECE 269 Krish Chakrabarty 12 6 Two Different Meanings of Functional Test ATE and Manufacturing World any vectors applied to cover high of faults during manufacturing test Automatic Test Pattern Generation World testing with verification vectors which determine whether hardware matches its specification typically have low fault coverage 70 ECE 269 Krish Chakrabarty 13 Test Specifications Plan Test Specifications Functional Characteristics Type of Device Under Test DUT Physical Constraints Package pin numbers etc Environmental Characteristics supply temperature humidity etc Reliability acceptance quality level defects million failure rate etc Test plan generated from specifications Type of test equipment to use Types of tests Fault coverage requirement ECE 269 Krish Chakrabarty 14 7 Test Programming ECE 269 Krish Chakrabarty 15 Test Data Analysis Uses of ATE test data Reject bad DUTs Fabrication process information Design weakness information Devices that did not fail are good only if tests covered 100 of faults Failure mode analysis FMA Diagnose reasons for device failure and find design and process weaknesses Allows improvement of logic layout design rules ECE 269 Krish Chakrabarty 16 8 ADVANTEST Model T6682 ATE ECE 269 Krish Chakrabarty 17 T6682 ATE Block Diagram ECE 269 Krish Chakrabarty 18 9 T6682 ATE Specifications Uses 0 35 m ICs 1024 pin channels Speed 250 500 or 1000 MHz Timing accuracy 200 ps Drive voltage 2 5 to 6 V Clock strobe accuracy 870 ps Clock settling resolution 31 25 ps Pattern multiplexing write 2 patterns in one ATE cycle Pin multiplexing use 2 pins to control 1 DUT pin ECE 269 Krish Chakrabarty 19 Pattern Generation Sequential pattern generator SQPG stores 16 Mvectors of patterns to apply to DUT vector width determined by DUT pins Algorithmic pattern generator ALPG 32 independent address bits 36 data bits For memory test has address descrambler Has address failure memory Scan pattern generator SCPG supports JTAG boundary scan greatly reduces test vector memory for full scan testing 2 Gvector or 8 Gvector sizes ECE 269 Krish Chakrabarty 20 10 Response Checking and Frame Processor Response Checking Pulse train matching ATE matches patterns on 1 pin for up to 16 cycles Pattern matching mode matches pattern on a number of pins in 1 cycle Determines whether DUT output is correct changes patterns in real time Frame Processor combines DUT input stimulus from pattern generators with DUT output waveform comparison Strobe time interval after pattern application when outputs sampled ECE 269 Krish Chakrabarty 21 Probing Pin electronics PE electrical buffering circuits put as close as possible to DUT Uses pogo pin connector at test head Test head interface through custom printed circuit board to wafer prober unpackaged chip test or package handler packaged chip test touches chips through a socket contactor Uses liquid cooling Can independently set VIH VIL VOH VOL IH IL VT for each pin Parametric Measurement Unit PMU ECE 269 Krish Chakrabarty 22 11 Pin Electronics ECE 269 Krish Chakrabarty 23 Probe Card and Probe Needles or Membrane Probe card custom printed circuit board PCB on which DUT is mounted in socket may contain custom measurement hardware current test Probe