R1typ Ohm R1max Ohm R1max TK Ohm Pw uW 0 12 15 13 7 10 50 60 420 300 2 11 32 0 12 15 11 5 15 50 60 520 390 3 07 24 180 15 22 12 5 15 50 60 510 390 3 24 20 390 8 2 39 10 4 20 60 80 375 560 3 57 18 390 12 39 14 4 20 60 80 335 540 4 08 16 390 12 47 13 4 20 60 80 353 580 4 24 12 390 15 47 13 4 30 70 90 312 1000 6 50 10 390 15 47 14 3 30 80 100 216 1200 8 14 8 390 15 47 15 3 35 80 100 372 1800 12 50 6 390 15 47 14 3 35 80 140 100 2200 10 66 5 390 22 47 18 3 35 80 140 110 2700 14 17 4 390 22 47 16 4 20 80 150 46 Rqmax Ohm CX2 pF CL pF C0typ pF 40 Safety Factor SF Frequency MHz Rx2 Ohm CX1 pF Issue B 3300 14 08 166 Decoupling capacitor on reverse of board CB Vss XTAL2 RX Vcc XTAL1 CX1 Connections to ground layer CX2 Crystal The Insider s Guide To Planning 166 Family Designs time for 60 degrees CC15 time las CC0 CC15 Injector Firing Angle time last 60 CC15 CC15 Interrupt cylinder 0 Injector Firing Angle 0 0 6 Injector 3 Opening Time 5 71 11 CC0 Interrupt cylinder 0 injector CC0 Inje CC3 Interrupt cylinder 3 injector 4 10 82 Injector 0 Opening Time jector Pulse Width 9 3 Injector Firing Angle 3 CC15 Interrupt cylinder 3 time for 60 degrees CC15 time last 6 CC3 CC15 Injector Firing Angle t time last 60 CC15 VAREF Varef input capacitance Analog Voltage Reference Internal Resistance Analog Voltage Reference GND Optional Over Voltage Protection Resistor Rap AN0 Signal Source Internal Resistance A D Convertor Sample Hold Capacitor A D Convertor Analog Signal Voltage Source VAGND 167 GND 166 Designer s Guide Page 1 This guide contains basic information that is useful when doing your first 166 family design There are many simple facts which if they are known at the outset can save a lot of time and money Overall it is intended as a complement to the user manuals by putting things into a practical context Some of the material can be found in the 166 family databooks but most of it is simply the result of our practical experience and so is only to be found here Topics covered are those that are not obvious or are often missed Where the user manuals provide a satisfactory explanation you will be referred to it rather than duplicating information here This is by no means a complete reference work and you are directed to the excellent work by one of the architecture s original designers Karl Heinz Mattheis available in the German language Note While every effort has been made to ensure the accuracy of the information contained within this guide Hitex cannot be held responsible for the consequences of any errors contained therein Any subjective or anecdotal information presented is not necessarily the official view of either Hitex UK Ltd or Siemens Plc Prepared By Michael Beach Stuart Kirkbride John Barstow Additional Material From Geoff Lees Mark De Sousa Ulrich Beier Olaf Pfeiffer Peter Mariutti Hitex produces the largest range of 166 family emulation and simulation tools available from any manufacturer By using both standard part and bondout based technology Hitex can uniquely provide the optimal emulation method for all 166 variants whatever the application Besides supplying the development tools Hitex is also pleased to help and advise new and prospective 166 users in all aspects of hardware and software design as this guide demonstrates we are at your service Hitex UK Ltd University Of Warwick Science Park Sir William Lyons Road Coventry CV4 7EZ Tel 01203 692066 Fax 01203 692066 Email 166 hitex co uk Compuserve 100646 1526 166 Designer s Guide Page 2 166 Designer s Guide Contents RISC Architectures For Embedded Applications 6 Introduction 6 Behind The 166 s Near RISC Core 6 Conventional CISC Bottle necks 6 The RISC Architecture For Embedded Control 7 Basic Definitions 7 Bus Interface 8 RISC Interrupt Response 8 Registers And Multi Tasking 8 Coping With RISC Instruction Set Apparent Omissions 10 RISC And Real World Peripherals 11 RISC Benefits In Embedded Applications 11 1 Getting Started With The 166 12 1 1 Basic Considerations 12 1 1 1 Family Overview 12 1 1 2 Fundamental Design Factors 12 1 2 1 Setting The CPU Hardware Configuration Options 166 12 1 2 2 Setting The CPU Hardware Configuration Options 167 12 1 3 Calculating The Pull Down Resistor Values 13 Pull Down Resistor Calculation 13 1 4 Pull Up Resistor Calculations 13 Pull Up Resistor Calculation 14 1 4 Setting The Configuration Without Pulldown Resistors 14 1 5 Port 0 Configuration Functions 15 1 6 Reset Control 16 2 Clock Speeds And Sources 17 2 1 166 Variants 17 2 2 165 And Basic 167 Variants 17 2 3 167SR CR Variants 17 2 4 Generating The Clock 17 2 4 1 Designing Clock Circuits 17 2 4 2 Oscillator Modules 17 2 4 3 Designing Crystal Oscillator Circuits 18 2 4 4 Crystal Oscillator Components Test Procedure 18 2 4 5 Typical Component Values 19 2 4 6 Laying Out Clock Circuits 20 2 4 7 Symptoms Of A Poor Clock 20 3 Bus Modes 21 3 1 Flexible Bus Interface 21 3 2 Setting The Bus Mode 21 3 2 1 166 Variants 21 3 2 2 C165 7 Derivatives 21 3 3 Setting The Overall Addressing Capabilities 21 3 4 External Memory Access Times 22 3 5 Expanding The Basic 166 s Memory Space 22 4 Interfacing To External Devices 23 4 1 The Integral Chip Selects 167 5 4 3 1 23 4 2 Setting The Number Of Chip Selects 24 4 3 READ WRITE Chip Selects 24 4 4 Replacing Address Lines With Chip Selects 25 4 5 Generating Extra Chip Selects 26 4 6 Confirming How The Pull Down Resistors Are Configured 27 4 7 Generating Waitstates 27 166 Designer s Guide Page 3 5 Addressing External Memory Devices 28 5 1 Using Byte Wide Memory Devices In 16 bit 167 Systems 29 5 2 Using The 166 With Byte Wide Memories 30 5 3 Using DRAM With The 166 Family 31 6 Single Chip 166 Family Considerations 32 6 1 Single Chip Operation 32 6 2 In Circuit Reprogrammability Of FLASH EPROM 32 6 3 Total Security For Proprietary Software 32 6 4 Keeping An External Bus 32 6 5 Accommodating In Circuit FLASH Programming 33 6 6 Hitex s Free In Circuit FLASH Programming Utilities 33 7 The Basic Memory Map 34 7 1 On Chip RAM Regions 34 7 1 1 166 Variants 34 7 1 2 167CR SR 164 Some 161 Variants 34 7 1 3 165 Variants 34 7 2 Planning The Memory Map 34 7 3 A Typical 167 System Memory Map 35 7 4 How CPU Throughput …
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