Berkeley ELENG 40 - The Insider's Guide To Planning 166 Family Designs

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166 Designer's Guide - ContentsRISC Architectures For Embedded Applications Introduction Behind The 166's Near-RISC Core Conventional CISC Bottle-necks The RISC Architecture For Embedded Control Basic Definitions: Bus Interface RISC Interrupt Response Registers And Multi-Tasking Coping With RISC Instruction Set (Apparent) Omissions RISC And Real World Peripherals RISC Benefits In Embedded Applications 1. Getting Started With The 166 1.1 Basic Considerations 1.1.1 Family Overview 1.1.2 Fundamental Design Factors 1.2.1 Setting The CPU Hardware Configuration Options (166) 1.2.2 Setting The CPU Hardware Configuration Options (167) 1.3 Calculating The Pull-Down Resistor Values Pull Down Resistor Calculation 1.4 Pull-Up Resistor Calculations Pull Up Resistor Calculation 1.4 Setting The Configuration Without Pulldown Resistors 1.5 Port 0 Configuration Functions 1.6 Reset Control 2. Clock Speeds And Sources 2.1 166 Variants 2.2 165 And Basic 167 Variants 2.3 167SR & CR Variants 2.4 Generating The Clock 2.4.1 Designing Clock Circuits 2.4.2 Oscillator Modules 2.4.3 Designing Crystal Oscillator Circuits 2.4.4 Crystal Oscillator Components Test Procedure 2.4.5 Typical Component Values 2.4.6 Laying Out Clock Circuits 2.4.7 Symptoms Of A Poor Clock 3. Bus Modes 3.1 Flexible Bus Interface 3.2 Setting The Bus Mode 3.2.1 166 Variants 3.2.2 C165/7 Derivatives 3.3 Setting The Overall Addressing Capabilities 3.4 External Memory Access Times 3.5 Expanding The Basic 166's Memory Space 4. Interfacing To External Devices 4.1 The Integral Chip Selects (167/5/4/3/1) 4.2 Setting The Number Of Chip Selects 4.3 READ/WRITE Chip Selects. 4.4 Replacing Address Lines With Chip Selects 4.5 Generating Extra Chip Selects 4.6 Confirming How The Pull-Down Resistors Are Configured 4.7 Generating Waitstates 5. Addressing External Memory Devices 5.1 Using Byte-Wide Memory Devices In 16-bit 167 Systems 5.2 Using The 166 With Byte-Wide Memories 5.3 Using DRAM With The 166 Family 6. Single Chip 166 Family Considerations 6.1 Single Chip Operation 6.2 In-Circuit Reprogrammability Of FLASH EPROM 6.3 Total Security For Proprietary Software 6.4 Keeping An External Bus 6.5 Accommodating In-Circuit FLASH Programming 6.6 Hitex's Free In-Circuit FLASH Programming Utilities 7. The Basic Memory Map 7.1 On-Chip RAM Regions 7.1.1 166 Variants 7.1.2 167CR/SR, 164, Some 161 Variants 7.1.3 165 Variants 7.2 Planning The Memory Map 7.3 A Typical 167 System Memory Map 7.4 How CPU Throughput Is Related To The Bus Mode 7.5 Implications Of Bus Mode/Trading Port Pins For IO 8. System Programming Issues 8.1 Serial Port Baud Rates Baudrates for 20 MHz Baudrates for 16 MHz 8.1.2 Enhanced Baudrate Generator On 167 Variants 8.1.3 The Synchronous Port On The 167 8.2 Interrupt Performance 8.2.1 Conventional Interrupt Servicing Factors 8.2.2 Event-Driven Data Transfers Via The PEC System PEC Usage Examples 8.2.3 Extending The PEC Address Ranges And Sizes Above 64K 8.2.4 Software Interrupts 8.2.5 Hardware Traps 8.2.6 Interrupt Vectors And Booting Up The 166 8.2.7 Interrupt Structure 8.3 The Bootstrap Loader 8.3.1 On-Chip Bootstrap Booted Systems 8.3.2 Freeware Bootstrap Utilities For 167 8.4 166 Family Stacks 8.5 Power Consumption 8.6 Understanding The DPPs 8.6.1 166 Derivatives 8.6.2 167 Derivatives 9. Allocating Pins/Port Pins In Your Application 9.1 General Points About Parallel IO Ports 9.2 Allocating Port Pins To Your Application 9.3 Port 0 Port 0 Pin Allocations: 9.4 Port 1 9.5 Port 2 9.5.1 The CAPCOM Unit 9.5.2 Time-Processor Unit Versus CAPCOM 9.5.3 32-bit Period Measurements 9.5.4 Generating PWM With The 166 CAPCOM Unit 9.5.5 Sinewave Synthesis Using The CAPCOM 9.5.6 Automotive Applications Of CAPCOM1 9. 5.7 Digital To Analog Conversion Using The CAPCOM Unit 9.5.8 Timebase Generation 9.5.9 Software UARTs 9.6 Port 3 9.6.1 Using GPT1 9.6.2 Using GPT2 9.7 Port 4 9.7.1 Interfacing To CAN Networks 9.8 Port 5 9.8.1 166 Analog To Digital Convertor 9.8.2 167 Analog To Digital Convertor 9.8.3 Over-Voltage Protected Analog Inputs 9.8.4 167/4-Specific Enhancements - wait-for-ADDAT-read mode - channel injection - programmable sampling times 9.8.5 Matching The A/D Inputs To Signal Sources 9.8.6 165/3 9.9 Port 6 (167) 9.10 Port 7 (167 Only) 50ns PWM Module/High Resolution Digital To Analog Convertor 9.11 Port 8 (167 Only) 9.12 Summary Of Port Pin Interrupt Capabilities 9.12.1 Interrupts From Port Pins 9.13 Typical 166 Family Applications 9.13.1 Automotive Applications 9.13.2 Industrial Control Applications 9.13.3 Telecommuncations Applications 9.13.4 Transport Applications 9.13.5 Consumer Applications 9.13.6 Instrumentation Applications 11. Mounting 166 Family Devices 11.1 Package Types 11.2 Emulating 166 Devices 11.3 166 Family PCBs 11.4 CAD Symbols 12. The ICE Connect Emulation Interface For External ROM 166 Family Designs 12.1 The Problem 12.2 The Solution -ICEconnect166 13. Getting New Boards Going 13.1 External Bus Design Pitfalls 13.2 Single Chip Designs 13.3 Testing The System 14. Conclusion 15. Acknowledgements 16. Feedback Further Reading 17. Contact Addresses Appendix 1 - Siemens C166 Family Part Numbers Appendix 2 - SGS-Thomson ST10 Variants Part Numbers166 Designers Guide - Page 101234567891011Injector FiringAngle 0Injector Firing Angle 3Injector 0 Opening TimeInjector 3 Opening TimeCC15 Interrupt, cylinder 0CC15 Interrupt, cylinder 3CC0 Interrupt, cylinder 0 injectorCC3 Interrupt, cylinder 3 injector{ time_for_60_degrees = CC15 - time_las CC0 = CC15 + (Injector_Firing _Angle time_last_60 = CC15 ; }{ time_for_60_degrees = CC15 - time_last_6 CC3 = CC15 + (Injector_Firing _Angle * t time_last_60 = CC15 ; }{ CC0 += Injejector_Pulse_Width ; }Issue B166CBCX1RXCX2CrystalDecoupling capacitor on reverse of board= Connections to ground layerVcc VssXTAL1XTAL2The Insiders Guide ToPlanning 166Family DesignsGNDGNDVAGNDAN0VAREFA/D ConvertorAnalog VoltageReferenceOptional Over-VoltageProtection ResistorSignal SourceInternalResistanceA/D ConvertorSample & HoldCapacitorVaref input capacitanceAnalog Signal Voltage SourceAnalog VoltageReference InternalResistanceRap167~~Frequency (MHz)Rx2 (Ohm)CX1 (pF)CX2 (pF)CL (pF)C0typ (pF)R1typ (Ohm)R1max (Ohm)R1max (TK) (Ohm)Pw (uW)Rqmax (Ohm)Safety Factor (SF)403224201816128654001803903903903903903903903901212158.2121215151522221515223939474747474747131112101413131516181475544443334101515202020303535352010 390 15 47 14 3


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Berkeley ELENG 40 - The Insider's Guide To Planning 166 Family Designs

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