1Lecture 32, Slide 1EECS40, Fall 2003 Prof. KingLecture #32ANNOUNCEMENTS• Midterm #2: x = 35.8 (71.6%); σ=6.9; hi=47.5; lo=13• (Midterm#1: x = 44.4 (88.8%); σ=7.2; hi=50; lo=10)• HW#9, Problem 3b: Assume tp<< 1 (negligible on timing diagram)OUTLINE• Computing the output capacitance– Propagation delay examples• History of IC devices and technologyReading (Rabaey et al.): Chapter 5.4, pp. 158-163Lecture 32, Slide 2EECS40, Fall 2003 Prof. KingMOSFET Layout and Cross-SectionTop View:Cross Section:2Lecture 32, Slide 3EECS40, Fall 2003 Prof. KingSource and Drain Junction CapacitanceCsource= Cj×(AREA) + Cjsw×(PERIMETER)= CjLSW + CJSW(2LS+ W)Lecture 32, Slide 4EECS40, Fall 2003 Prof. KingComputing the Output CapacitanceInOutMetal1VDDGNDPoly-SiPMOSW/L=9λ/2λInOutExample 5.4 (pp. 161-163)NMOSW/L=3λ/2λ2λ=0.25µm3Lecture 32, Slide 5EECS40, Fall 2003 Prof. KingInOutVDDGNDPMOSW/L=9λ/2λNMOSW/L=3λ/2λ2λ=0.25µmCapacitances for 0.25µm technology:Gate capacitances:•Cox(NMOS) = Cox(PMOS) = 6 fF/µm2Overlap capacitances:• CGDO(NMOS) = Con= 0.31fF/µm• CGDO(PMOS)= Cop= 0.27fF/µmBottom junction capacitances:•CJ(NMOS) = KeqbpnCj= 2 fF/µm2•CJ(PMOS) = KeqbppCj= 1.9 fF/µm2Sidewall junction capacitances:•CJSW(NMOS) = KeqswnCj= 0.28fF/µm•CJSW(PMOS) = KeqbppCj= 0.22fF/µmLecture 32, Slide 6EECS40, Fall 2003 Prof. King4Lecture 32, Slide 7EECS40, Fall 2003 Prof. KingExamples of Propagation Delay~20 ps3.2 GHz0.13 µmPentium IV~40 ps1.8 GHz0.18 µmPentium III~100 ps600 MHz0.25 µmPentium IIFan-out=4 inverter delayClock frequency, fCMOS technology generationProductTypical clock periods:• high-performance µP: ~15 FO4 delays• PlayStation 2: 60 FO4 delaysLecture 32, Slide 8EECS40, Fall 2003 Prof. King• 1940’s: Vacuum-tube era– Vacuum tubes were used for radios, television, telephone equipment, and computers… but they were expensive, bulky, fragile, & energy-hungryEarly History of IC Devices and TechnologyNobel Prize in Physics 1956→ Invention of the bipolar junction transistor▪ William Shockley, Bell Labs, 1950– more stable and reliable; easier and cheaper to make … reproducibility was an issue, howeverLee De Forest, 1906→ Invention of the point-contact transistor▪ Walter Brattain, John Bardeen, and William Shockley, Bell Labs, 19475Lecture 32, Slide 9EECS40, Fall 2003 Prof. KingDiscrete Electronic Circuits• In 1954, Texas Instruments produced the first commercial silicon transistor.• Before the invention of the integrated circuit, electronic equipment was composed of discrete components such as transistors, resistors, and capacitors. These components, often simply called “discretes”, were manufactured separately and were wired or soldered together onto circuit boards. Discretes took up a lot of room and were expensive and cumbersome to assemble, so engineers began, in the mid-1950s, to search for a simpler approach…~$2.50 eachLecture 32, Slide 10EECS40, Fall 2003 Prof. KingThe Integrated Circuit (IC)• An IC is built of interconnected electronic components in a single piece (“chip”) of semiconductor material. • In 1958, Jack S. Kilby (Texas Instruments) showed that it was possible to fabricate a simple IC in germanium.• In 1959, Robert Noyce (Fairchild Semiconductor) described how an IC can be made in silicon using silicon dioxide as the insulator and aluminum for the metallic lines. Kilby and Noyce are considered to be co-inventors of the IC.The first IC was made out of a thin slice of germanium and contains a bipolar transistor, a capacitor, and several resistors. It has four input/output terminals, a ground terminal, and wires of gold. The assemblage is held together with wax. Nobel prize in Physics 20006Lecture 32, Slide 11EECS40, Fall 2003 Prof. KingThe First Planar IC• This chip has four bipolar transistors (the bright blue nose-cone-like features toward the center of the photo) and five resistors (the bright blue horizontal and vertical bars). The white bars are aluminum connectors, normally attached to the external world by wires (not shown here)soldered to the pads at the edge of the device. Actual size: 0.06 in. diameterFairchild Semiconductor, 1959Fairchild Semiconductor and Texas Instruments both introduced commercial ICs in 1960.Lecture 32, Slide 12EECS40, Fall 2003 Prof. KingField-Effect Transistors• The field-effect transistor was invented before the bipolar junction transistor– J.E. Lilienfeld, U.S. Patent 1,745,175 (1930) – O. Heil, British Patent 439,457 (1935)… but it was not successfully demonstrated until 1960 by M. Atalla and D. Kahng at Bell Labs. • In 1963, Frank Wanlass (Fairchild Semiconductor) introduced CMOS technology. The first CMOS integrated circuits were made by RCA in 1968. • The MOSFET is smaller and simpler to fabricate than a bipolar junction transistor; therefore, more MOSFETs can be formed on a given-size chip. The need for high-density memory (DRAMs) in the 1970’s caused MOS to become the dominant IC technology.7Lecture 32, Slide 13EECS40, Fall 2003 Prof. KingIC Manufacturing: Planar ProcessingSi waferProcess steps are sequentially applied to thin slices (“wafers”) of silicon in order to fabricate simultaneously and interconnect billions of electronic devices (e.g.transistors) on the front surface.MOSFETProcessingSteps• oxidation• anneal• implantation• deposition• lithography•etchLecture 32, Slide 14EECS40, Fall 2003 Prof. KingFrom a Few, to Billions• By connecting a large number of components, each performing simple operations, an IC that performs very complex tasks can be built. The degree of integration has increased at an exponential pace over the past ~40 years. Gordon Moore was the first to note this evolution, in 1965.– The number of devices on a chipdoubles every 18 months, for the same price.Æ 30% reduction in cost/function per yrÆ 2X speed improvement every 3 yrs “Moore’s Law” still holds today.The largest ICs today contain ~10 billion transistors!8Lecture 32, Slide 15EECS40, Fall 2003 Prof. KingModern IC Technology• Scaling MOSFETs to smaller dimensions – gate lengths below 20 nm have already been demonstrated by AMD, IBM, Intel, Toshiba, etc.Æ most advanced transistor designs are based on UC-Berkeley research (Prof.s Hu, King, Bokor)• Approaching technology/economic limits (?)• Increasing # of levels of wiring (Cu interconnects)~10-level metal entering productionPhoto from IBM Microelectronics Gallery:Colorized
View Full Document
Unlocking...