Lecture 32 ANNOUNCEMENTS Midterm 2 x 35 8 71 6 6 9 hi 47 5 lo 13 Midterm 1 x 44 4 88 8 7 2 hi 50 lo 10 HW 9 Problem 3b Assume tp 1 negligible on timing diagram OUTLINE Computing the output capacitance Propagation delay examples History of IC devices and technology Reading Rabaey et al Chapter 5 4 pp 158 163 EECS40 Fall 2003 Lecture 32 Slide 1 Prof King MOSFET Layout and Cross Section Top View Cross Section EECS40 Fall 2003 Lecture 32 Slide 2 Prof King 1 Source and Drain Junction Capacitance Csource Cj AREA Cjsw PERIMETER CjLSW CJSW 2LS W EECS40 Fall 2003 Lecture 32 Slide 3 Prof King Computing the Output Capacitance 2 0 25 m Example 5 4 pp 161 163 VDD In Out PMOS W L 9 2 Poly Si Out In NMOS W L 3 2 GND Metal1 EECS40 Fall 2003 Lecture 32 Slide 4 Prof King 2 2 0 25 m VDD PMOS Capacitances for 0 25 m technology W L 9 2 Gate capacitances Cox NMOS Cox PMOS 6 fF m2 Overlap capacitances In CGDO NMOS Con 0 31fF m CGDO PMOS Cop 0 27fF m Bottom junction capacitances CJ NMOS KeqbpnCj 2 fF m2 NMOS CJ PMOS KeqbppCj 1 9 fF m2 W L 3 2 Sidewall junction capacitances GND CJSW NMOS KeqswnCj 0 28fF m CJSW PMOS KeqbppCj 0 22fF m Out EECS40 Fall 2003 Lecture 32 Slide 5 Prof King EECS40 Fall 2003 Lecture 32 Slide 6 Prof King 3 Examples of Propagation Delay Product CMOS technology generation Clock frequency f Pentium II 0 25 m 600 MHz Fan out 4 inverter delay 100 ps Pentium III 0 18 m 1 8 GHz 40 ps Pentium IV 0 13 m 3 2 GHz 20 ps Typical clock periods high performance P 15 FO4 delays PlayStation 2 60 FO4 delays EECS40 Fall 2003 Lecture 32 Slide 7 Prof King Early History of IC Devices and Technology 1940 s Vacuum tube era Lee De Forest 1906 Vacuum tubes were used for radios television telephone equipment and computers but they were expensive bulky fragile energy hungry Invention of the point contact transistor Walter Brattain John Bardeen and William Shockley Bell Labs 1947 Nobel Prize in Physics 1956 reproducibility was an issue however Invention of the bipolar junction transistor William Shockley Bell Labs 1950 more stable and reliable easier and cheaper to make EECS40 Fall 2003 Lecture 32 Slide 8 Prof King 4 Discrete Electronic Circuits In 1954 Texas Instruments produced the first commercial silicon transistor 2 50 each Before the invention of the integrated circuit electronic equipment was composed of discrete components such as transistors resistors and capacitors These components often simply called discretes were manufactured separately and were wired or soldered together onto circuit boards Discretes took up a lot of room and were expensive and cumbersome to assemble so engineers began in the mid 1950s to search for a simpler approach EECS40 Fall 2003 Lecture 32 Slide 9 Prof King The Integrated Circuit IC An IC is built of interconnected electronic components in a single piece chip of semiconductor material In 1958 Jack S Kilby Texas Instruments showed that it was possible to fabricate a simple IC in germanium Nobel prize in Physics 2000 In 1959 Robert Noyce Fairchild Semiconductor described how an IC can be made in silicon using silicon dioxide as the insulator and aluminum for the metallic lines Kilby and Noyce are considered to be co inventors of the IC The first IC was made out of a thin slice of germanium and contains a bipolar transistor a capacitor and several resistors It has four input output terminals a ground terminal and wires of gold The assemblage is held together with wax EECS40 Fall 2003 Lecture 32 Slide 10 Prof King 5 The First Planar IC This chip has four bipolar transistors the bright blue nose cone like features toward the center of the photo and five resistors the bright blue horizontal and vertical bars The white bars are aluminum connectors normally attached to the external world by wires not shown here soldered to the pads at the edge of the device Actual size 0 06 in diameter Fairchild Semiconductor 1959 Fairchild Semiconductor and Texas Instruments both introduced commercial ICs in 1960 EECS40 Fall 2003 Lecture 32 Slide 11 Prof King Field Effect Transistors The field effect transistor was invented before the bipolar junction transistor J E Lilienfeld U S Patent 1 745 175 1930 O Heil British Patent 439 457 1935 but it was not successfully demonstrated until 1960 by M Atalla and D Kahng at Bell Labs In 1963 Frank Wanlass Fairchild Semiconductor introduced CMOS technology The first CMOS integrated circuits were made by RCA in 1968 The MOSFET is smaller and simpler to fabricate than a bipolar junction transistor therefore more MOSFETs can be formed on a given size chip The need for high density memory DRAMs in the 1970 s caused MOS to become the dominant IC technology EECS40 Fall 2003 Lecture 32 Slide 12 Prof King 6 IC Manufacturing Planar Processing Process steps are sequentially applied to thin slices wafers of silicon in order to fabricate simultaneously and interconnect billions of electronic devices e g transistors on the front surface MOSFET Processing Steps Si wafer oxidation anneal implantation deposition lithography etch EECS40 Fall 2003 Lecture 32 Slide 13 Prof King From a Few to Billions By connecting a large number of components each performing simple operations an IC that performs very complex tasks can be built The degree of integration has increased at an exponential pace over the past 40 years Gordon Moore was the first to note this evolution in 1965 The number of devices on a chip doubles every 18 months for the same price 30 reduction in cost function per yr 2X speed improvement every 3 yrs Moore s Law still holds today The largest ICs today contain 10 billion transistors EECS40 Fall 2003 Lecture 32 Slide 14 Prof King 7 Modern IC Technology Increasing of levels of wiring Cu interconnects 10 level metal entering production Photo from IBM Microelectronics Gallery Colorized scanning electron micrograph of the copper interconnect layers after removal of the insulating layers by a chemical etch Scaling MOSFETs to smaller dimensions gate lengths below 20 nm have already been demonstrated by AMD IBM Intel Toshiba etc most advanced transistor designs are based on UC Berkeley research Prof s Hu King Bokor Approaching technology economic limits EECS40 Fall 2003 Lecture 32 Slide 15 Prof King EECS40 The Home Stretch To complete this course we will learn How are integrated circuits made Overview of microfabrication technology CMOS fabrication process Where is the output capacitance which limits performance CMOS layout and circuit extraction Interconnect modeling What
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