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Berkeley ELENG 40 - Lecture Notes

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EE40 Lec 18EE40 Lec 18Diode CircuitsDiode CircuitsReading Chap 10 of HambleReading: Chap. 10 of HambleySupplement Reading on Diode Circuitshttp://www inst eecs berkeley edu/~ee40/fa09/handouts/EE40 MOS Circuit pdfSlide 1EE40 Fall 2009 Prof. Cheunghttp://www.inst.eecs.berkeley.edu/ ee40/fa09/handouts/EE40_MOS_Circuit.pdfDiodes Circuits–Load Line Analysisy–Analysis of Diode Circuits by assumed statesassumed states–Diode Logic Circuits–Wave Shaping CircuitsRectifying Circuits–Rectifying CircuitsSlide 2EE40 Fall 2009 Prof. CheungSOLVING CIRCUITS WITH NONLINEAR ELEMENTSLook at circuits with a nonlinear element like this:ILINLLinear circuitL+VLNonlinear elementNL+VNL--A nonlinear element with its own I-V relationship, attached to a linear circuit with its own I-V relationship.1. IL= fL(VL) (linear circuit I-V relationship)2. INL= gNL(VNL) (nonlinear element I-V relationship)3. INL= -IL4.VNL=VLSlide 3EE40 Fall 2009 Prof. Cheung4.VNL VLSOLVING CIRCUITS WITH NONLINEAR ELEMENTSThe 4 equations can be reduced to 2 equations in INLand VNLINL= -fL(VNL) - the linear “loadline” INL= gNL(VNL)which we can equate and solve for VNL, or…graph the two equations and solve for the intersection.Slide 4EE40 Fall 2009 Prof. CheungEXAMPLE+INL+1 kΩ+IGiven : I0=10-15A.+-VNL+_2 VVL_ILGiven : I0 10A.Find VNL1. IL= (VL- 2) / 1000()1e10I026.0/NLV15NL−=−2.3IISubstitute 1 and 2 in 33.INL= -IL4. VNL= VL()[]1000/)2V(1e10NL15026.0/NLV−−=−−Substitute 1 and 2 in 3Slide 5EE40 Fall 2009 Prof. CheungSolve by iteration, VNL~ 0.725V0.004linearGraphical Solution0.0030.0035linearnonlinear0.0020.0025Loadline: I= - (V-2)/1000 0.0010.0015I_NL00.0005Diode I-V0.725V-0.001-0.00050.725VSlide 6EE40 Fall 2009 Prof. Cheung-1 -0.5 0 0.5 1V_NLPiecewise–linear Model of Nonlinear Devices-5.5Vintercept+1.5Vintercept100/)5.1v(i:BSegment400/vi:ASegment−==Slide 7EE40 Fall 2009 Prof. Cheung800/)5.5v(i:CSegment)(g+=Ideal Diode Model of PN DiodeID(A)ID+IDCircuit symbol I-VcharacteristicSwitch modelforward biasVD+VD–reverse biasVD(V)–Diode behaves like a switch: • closed in forward bias mode • open in reverse bias modeSlide 8EE40 Fall 2009 Prof. Cheung•used when voltage of interest >> 0.6VPiecewise Linear ModelID++IDCircuit symbol I-VcharacteristicSwitch modelID(A)VDVDforward bias+−VDonVD(V)––reverse biasVDonFor a Si pn diode, VDon ≅0.6 VDiode behaves like a voltage source in series with a switch: • closed in forward bias mode i bi d Slide 9EE40 Fall 2009 Prof. Cheung• open in reverse bias modeZener DiodeA Zener diode is designed to operate in the breakdown mode.ID(A)(l k ) tID(A)V(V)reverse (leakage) currentforward currentbreakdown voltageVBDVD(V)Rtvs(t) >15V for all tintegratediitR+v(t)+v(t)Slide 10EE40 Fall 2009 Prof. CheungcircuitVBD = 15Vvs(t)–vo(t)–Piecewise-linear Model of a Zener DiodeSlide 11EE40 Fall 2009 Prof. CheungDiode Circuit Analysis by Assumed Diode States•1) Specify Ideal Diode Model or Piecewise-Linear Diode Model ID(A)ID(A)reverse biasforward biasVD(V)reverse biasforward bias•2) Each diode can be ON or OFFVD(V)VDon•3) Circuit containing n diodes will have 2nstates•4) The combination of states that works for ALL di d ( i t t ith KVL d KCL) ill b thSlide 12EE40 Fall 2009 Prof. Cheungdiodes (consistent with KVL and KCL) will be the solutionExample Analysis by assumed Diode StatesD1=on D2=on×1.75mA0.5mAD1=off D2=on +10+3D1=on D2=off+30×D1=off D2=off +10×√D1=on D2=off +3+6Slide 13EE40 Fall 2009 Prof. CheungTransfer Function of Diode CircuitsPiecewise-Linear Model with 0.6V voltage dropSlide 14EE40 Fall 2009 Prof. CheungDiode Logic: AND Gate• AND gateVInputsAandBvary between 0Piecewise-Linear Model with 0.6V voltage dropRVccInputs Aand Bvary between 0 Volts (“low”) and Vcc (“high”)Between what voltage levels doesCvary with V=5VVARANDCdoes Cvary with VCC=5VVOUT5BSlope =1EOCO t t lt C i hi h Shift 0.7V UpOutput voltage C is high only if both A and B are highSlide 15EE40 Fall 2009 Prof. CheungVIN050both A and B are highDiode Logic: OR Gate• OR gateInputs A and B vary between 0 V lt (“l ”) dV(“hi h”)Piecewise-Linear Model with 0.6V voltage dropABCVolts (“low”) and Vcc (“high”)Between what voltage levels does C vary with VCC=5V?BRORCVOUT5Output voltage C is high if EOCOutput voltage C is high if either (or both) A and B are highSlope =1Shift 0.7V DownSlide 16EE40 Fall 2009 Prof. CheungVIN0500.7VDiode Logic: Incompatibility and DecayAND gate OR gateSignal Decays with each stage (Not regenerative)output voltage is high only if both A and B are highoutput voltage is high if either (or both) A and B are highVccRANDABCA CANDBRORCORB0.6V dropSlide 17EE40 Fall 2009 Prof. CheungClipper CircuitsAssume forward diode has 0 voltage drophas 0 voltage dropSlide 18EE40 Fall 2009 Prof. CheungPeak Detector CircuitVi(t)Assume the ideal (perfect rectifier) model.+VC(t)Vi(t)+CVi+−−VC(t)i()−tVC(t)VCIdea: The capacitor hdtcharges due to one way current behavior of the diode. Slide 19EE40 Fall 2009 Prof. CheungPeak Detector with Load ResisterSlide 20EE40 Fall 2009 Prof. CheungLevel Shift Circuit -VC+VINVCVOUT+VIN+Ct--V=V+VVOUT13VOUT = VC+ VINt21) Diode =open, VC=0, VOUT = VIN2) Diode =short, VC= -VIN, VOUT=03) Diode =open V=V(min) V=V+VSlide 21EE40 Fall 2009 Prof. Cheung3) Diode =open, VC= -VIN (min) , VOUT= VIN+VC,Clamp Circuit (level shifter)Max of vin(t)=5 sin(ωt)is shifted by -5V bhdidlby the diode-voltage source combinationSlide 22EE40 Fall 2009 Prof. CheungVoltage Doubler Circuit-VC1++ VC21R2VOUT+VIN+C2R1VOUT+VIN+C1-----Level ShiftPeak DetectSee Homework problemOutput is the peak to peak voltage of the inputSlide 23EE40 Fall 2009 Prof. CheungOutput is the peak to peak voltage of the input.Half Wave Rectifier Equivalent circuitV >0.6V, diode = short circuitÆV=VI-06ÆVo VI 0.6V < 0.6V, diode = open circuitpÆ Vo =0Slide 24EE40 Fall 2009 Prof. CheungAdding a capacitor: what does it do?+Vmsin (ωt)RV0C0-Slide 25EE40 Fall 2009 Prof. CheungHalf-Wave RectifierCurrent charging up capacitorSlide 26EE40 Fall 2009 Prof. CheungFull Wave RectifierSlide 27EE40 Fall 2009 Prof. CheungSmall –Signal Linear Equivalent CircuitSuppose the nonlinear device has the functional dependence I = i(v) is biased with a DC voltage vGat the Q-point (quiescent point) A small differential voltage∆vispoint (quiescent point). A small differential voltage ∆v is added on top of vG. Using Taylor series


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Berkeley ELENG 40 - Lecture Notes

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