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EE40 Final Exam Review Prof. Nathan CheungOverview of CourseSlide 3Slide 4Slide 5Diode with Capacitor Circuit (e.g.Level Shifter)Example: Diode with RL CircuitSlide 8Slide 9Example : Voltage controlled AttenuatorSlide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 17Slide 18Slide 19Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27The CMOS Inverter: Current FlowSlide 29Slide 30Slide 31Slide 32Slide 33Amplifier EfficiencyDifferential Signal and Common Mode SignalCommon Mode Rejection RatioSlide 37Slide 1EE40 Fall 2009 Prof. CheungEE40Final Exam ReviewProf. Nathan Cheung12/01/2009Practice with past examshttp://hkn.eecs.berkeley.edu/exam/list/?exam_course=EE%2040Slide 2EE40 Fall 2009 Prof. Cheung2Overview of Course Circuit components: R, C, L , sources I-V characteristics energy storage/dissipationCircuit analysis: Laws: Ohm’s, KVL, KCL  Equivalent circuits (series/ parallel, Thevenin, Norton)  Superposition for linear circuits  Nodal analysis  Mesh analysis  Phasor I and VFirst-order transient excitation/analysis:Second Order RLC circuitsBode PlotsSlide 3EE40 Fall 2009 Prof. Cheung3Semiconductors Devices pn-diodes (many types) FETs (n-channel, p-channel, CMOS)Useful Diode and FET circuits: Amplifiers: op-amp (negative feedback), rectifiers; wave shaping circuitsLogic gates; Combinatorial logic (sum-of-products, Karnaugh maps), sequential logic etc.Overview of CourseSlide 4EE40 Fall 2009 Prof. Cheung Diode Circuit Analysis by Assumed Diode States•1) Specify Ideal Diode Model or Piecewise-Linear Diode Model •2) Each diode can be ON or OFF•3) Circuit containing n diodes will have 2n states•4) The combination of states that works for ALL diodes (consistent with KVL and KCL) will be the solutionreverse biasforward biasID (A)VD (V)reverse biasforward biasID (A)VDonSlide 5EE40 Fall 2009 Prof. CheungExample Problem: Perfect Rectifier ModelSketch Vout versus VinSuggested problem: What if there is a 0.6V drop when diodes are on ?Slide 6EE40 Fall 2009 Prof. CheungDiode with Capacitor Circuit (e.g.Level Shifter) - VC +VOUT+-VIN+-CVINt1) Diode =open, VC(t)=0, VOUT (t)= VIN(t)2) Diode =short, VC(t)= -VIN(t) , VOUT(t)=03) Diode =open, VC(t)= -VIN(min), VOUT(t)= VIN(t)-VIN(min)VOUT (t)= VC(t)+ VIN(t), VCVOUTt132Finds out what happens to VC when VIN changesVIN(min)Slide 7EE40 Fall 2009 Prof. CheungExample: Diode with RL CircuitAnswerSketch i(t) = L/R = 0.05 msecNote: i(t) is continuousSlide 8EE40 Fall 2009 Prof. CheungLoad-Line AnalysisWe have a circuit containing a two-terminal non-linear element “NLE”, and some linear components.1V+-250KSNon-linear element9A1MD+-2V200KSNLEDThen define I and V at the NLE terminals (typically associated signs)First replace the entire linear part of the circuit by its Thevenin equivalent.IDVDS+ -Slide 9EE40 Fall 2009 Prof. CheungExample of Load-Line Analysis (con’t)And have this connected to a linear (Thévenin) circuit +-2V200KThe solution !Given the graphical properties of two terminal non-linear circuit (i.e. the graph of a two terminal device)VDSIDA)10(V)1 2IDDNLESWhose I-V can also be graphed on the same axes (“load line”)Application of KCL, KVL gives circuit solution+-2V200KSNLEDIDVDS+ -Slide 10EE40 Fall 2009 Prof. CheungExample : Voltage controlled Attenuator VC and RC Determines rd atQ point of diodeSlide 11EE40 Fall 2009 Prof. CheungThe large capacitors and DC bias source are effective shortsfor the ac signal in small-signal circuitsExample : Voltage Controlled AttenuatorSlide 12EE40 Fall 2009 Prof. Cheung12VDSIDA)10(V)12Three-Terminal Parametric GraphsConcept of 3-Terminal Parametric Graphs: We set a voltage (or current) at one set of terminals (here we will apply a fixed VGS, IG=0) and conceptually draw a box around the device with only two terminals emerging so we can again plot the two-terminal characteristic (here ID versus VDS).3-Terminal DeviceIDDGSVGS+-VGS = 3VGS = 2VGS = 1But we can do this for a variety of values of VGS with the result that we get a family of curves.Slide 13EE40 Fall 2009 Prof. Cheung13Graphical Solutions for 3-Terminal DevicesNow draw ID vs VDS for the 2V - 200K Thevenin source. First select VGS (e.g. 2V) and draw ID vs VDS for the 3-Terminal device. VDSIDA)10(V)12VGS = 3VGS = 2VGS = 1IDG+-+-V2VD200KSVDSIDA)10(V)1 2The only point on the I vs V plane which obeys KCL and KVL is ID = 5A at VDS = 1V. The solution !We can only find a solution for one input (VGS) at a time:Slide 14EE40 Fall 2009 Prof. Cheung1) Guess the mode of operation for the transistor. (We will learn how to make educated guesses).2) Write the ID vs. VDS equation for this guess mode of operation.3) Use KVL, KCL, etc. to come up with an equation relating ID and VDS based on the surrounding linear circuit.4) Solve these equations for ID and VDS.5) Check to see if the values for ID and VDS are possible for the mode you guessed for the transistor. If the values are possible for the mode guessed, stop, problem solved. If the values are impossible, go back to Step 1. SOLVING MOSFET CIRCUITS: STEPSSlide 15EE40 Fall 2009 Prof. CheungCHECKING THE ANSWERSNMOS1) VGS > VT(N) in triode or saturation VGS ≤ VT(N) in cutoff•2) VDS < VGS – VT(N) in triode VDS ≥ VGS – VT(N) in saturationDS tov V+0GSvTriodeSaturationCut-offtoVPMOS1) VGS < VT(P) in triode or saturation VGS ≥ VT(P) in cutoff2) VDS > VGS – VT(P) in triode VDS ≤ VGS – VT(P) in saturationDS tov V+0GSvTriodeSaturationCut-offtoVSlide 16EE40 Fall 2009 Prof. CheungExample Problem : MOSFET CircuitSlide 17EE40 Fall 2009 Prof. CheungFind VGS such that VDS=2VExample Problem : MOSFET CircuitAnswerCheck: VDS(=2V) > VGS-VT (=1.5-0.5=1V)MOSFET indeed is in saturation modeGuess Saturation ModeSlide 18EE40 Fall 2009 Prof. CheungFind small-signal model parametersExample Problem : MOSFET Circuit=10-5 SiemensSlide 19EE40 Fall 2009 Prof. CheungHow do you guess the right mode ?Often, the key is the value of VGS.(We can often find VGS directly without solving the whole circuit.)VGS ≤ VT(N)definitely cutoffVDSIDVGS = VT(N) + probably saturationVDSIDVGS - VT(N) = Slide 20EE40 Fall 2009 Prof. Cheungtriode modesaturation modeVDSVGS - VTH(N)When VGS >> VTH(N), it’s harder to guess the mode.IDIf ID is small, probably triode modeHow do you guess the right mode ?Slide 21EE40 Fall 2009 Prof. CheungEXAMPLEGDSID+VGS_+VDS_+_+_4 V3 V1.5 kGIVEN: VTH(N) = 1 V, K= 250  A/V2, 


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Berkeley ELENG 40 - Final Exam Review

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