Lecture 4RC CircuitsRC ResponseSlide 4Charging and DischargingCommon CasesCharging and discharging in RC Circuits (The official EE40 Easy Method)ExamplePULSE DISTORTIONSlide 10Slide 11EXAMPLEAPPLICATIONSSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaLecture 4When we perform a sequence of computations using a digital circuit, we switch the input voltages between logic 0 and logic 1.The output of the digital circuit fluctuates between logic 0 and logic 1 as computations are performed.Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaRC CircuitsEvery node in a circuit has capacitance to ground, and it’sthe charging of these capacitances that limits real circuit performance (speed)We compute with pulses We send beautiful pulses inBut we receive lousy-looking pulses at the outputCapacitor charging effects are responsible!timevoltagetimevoltageSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaRC ResponseVinRVoutCInternal Modelof Logic GatetimeVout00Vout0Vintime0Vout(t=0)VinVout(t=0)Behavior of Vout after change in VinSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaKCL at node “out”:Current into “out” from the left:(Vin - Vout) / RCurrent out of “out” down to ground:C dVout / dtKCL:(Vin – Vout) / R = C dVout / dtRC Response DerivationoutgroundRCVinVout+_+-)VV(RC1dtdVoutinoutVout(t) = Vin + [ Vout(t=0) – Vin ] e-t/(RC)Solution:“Time Constant” = RCSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaCharging and DischargingCharging: Vin > Vout(t=0)Discharging: Vin < Vout(t=0).63 Vin+ .37 Vout(t=0)VoutVintimeVout(t=0)Vout(t) = Vin(1-e-t/) + Vout(t=0)e-t/0.63 Vin+ .37 Vout(t=0)VoutVintimeVout(t=0)063% of transition complete after 1 Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaCommon CasesTransition from logic 0 to logic 1(charging)timeVout00V1.63 V1VoutV1time00.37 V1Vout(t) = V1(1-e-t/)Vout(t) = V1e-t/Transition from logic 1 to logic 0(discharging)(V1 is logic 1 voltage)Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaCharging and discharging in RC Circuits(The official EE40 Easy Method)Input node Output nodegroundRCVinVout+-4) Solve the for asymptotic value of capacitor voltage. Hint: Capacitor eventually conducts no current (dV/dt dies out asymptotically).5) Sketch the transient. It is 63% complete after one time constant.6) Write the equation by inspection.1) Simplify the circuit so it looks like one resistor, a source, and a capacitor (it will take another two weeks to learn all the tricks to do this.) But then the circuit looks like this:Method of solving for any node voltage in a single capacitor circuit.2) The time constant is = RC.3) Solve for the capacitor voltage before the transient, Vout(t=0).Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaExampleInput node Output nodegroundRCVinVout+-R = 1k, C = 1pF.Assume Vin has been zero for a long time, then steps from zero to 10 V at t=0.timeVin0010Vout1 ns6.3VVout(t) = 10 - 10e-t/1 nsAt t=0, since Vin has been constant for a long time, the circuit is in “steady-state”. Capacitor current is zero (since dV/dt = 0), so by KVL, Vout(t=0) = 0.Asymptotically, the capacitor will have no current, so the capacitor voltage will be equal to Vin, 10 V (resistor will have 0 V).The time constant = RC = 1 ns. We can plug into the equation and draw the graph Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaPULSE DISTORTIONWhat if I want to step up the input,wait for the output to respond,then bring the input back down for a different response? timeVin00timeVin00VouttimeVin00VoutSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaInput node Output nodegroundRCVin+-OThe pulse width must be long enough, or we get severe pulse distortion.We need to reach a recognizable logic level.01234560 1 2 3 4 5TimeVoutPW = 0.1RC01234560 1 2 3 4 5TimeVoutPW = RC01234560 5 10 15 20 25TimeVoutPW = 10RCPULSE DISTORTIONSheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaEXAMPLEVinRVoutCSuppose a voltage pulse of width5 s and height 4 V is applied to theinput of the circuit at the right. Sketch the output voltage. R = 2.5 KΩC = 1 nFFirst, the output voltage will increase to approach the4 V input, following the exponential form. When the input goes back down, the output voltage will decrease back to zero, again following exponential form.How far will it increase? Time constant = RC = 2.5 sThe output increases for 5s or 2 time constants.It reaches 1-e-2 or 86% of the final value.0.86 x 4 V = 3.44 V is the peak value.Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaEXAMPLE00.511.522.533.540 2 4 6 8 10The equation for the output is:Vout(t) =4-4e-t/2.5s for 0 ≤ t ≤ 5 s3.44e-(t-5s)/2.5s for t > 5 s{Sheila Ross and W. G. OldhamEECS 40 Spring 2003 Lecture 4Copyright Regents of University of CaliforniaAPPLICATIONS•Now we can find “propagation delay” tp; the time between the input reaching 50% of its final value and the output to reaching 50% of final value.•For instantaneous input transitions between 0 V and logic 1, 0.5 = e-tp tp = - ln 0.5 = 0.69It takes 0.69 time constants, or 0.69 RC.•We can find the time it takes for the output to reach other desired levels. For example, we can find the time required for the output to go from 0 V to the minimum voltage level recognizable as logic 1 (known as VIH).•Knowing these delays helps us design clocked
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