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Berkeley ELENG 40 - Lecture Notes

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1EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu1Midterm 1 Announcements Review session: 5-8pm TONIGHT 277 Cory Midterm 1: 11:30-1pm on Tuesday, July 12 in Dwinelle145. Material covered in HW1-3 Attend only your second lab slot this weekEE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu2Review: Second-Order Filter CircuitsC+–VSRBand PassLow PassLHigh PassBand RejectZ = R + 1/jωC + jωLHBP= R / ZHLP= (1/jωC) / ZHHP= jωL/ ZHBR= HLP+ HHP2EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu3Lecture #9OUTLINE The operational amplifier (“op amp”) Ideal op amp Feedback Unity-gain voltage follower circuit Summing, difference, integrator, differentiator, active filterReadingCh. 14EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu4The Operational Amplifier The operational amplifier (“op amp”) is a basic building block used in analog circuits. Its behavior is modeled using a dependent source. When combined with resistors, capacitors, and inductors, it can perform various useful functions: amplification/scaling of an input signal sign changing (inversion) of an input signal addition of multiple input signals subtraction of one input signal from another integration (over time) of an input signal differentiation (with respect to time) of an input signal analog filtering nonlinear functions like exponential, log, sqrt, etc3EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu5Op Amp Terminals 3 signal terminals: 2 inputs and 1 output IC op amps have 2 additional terminals for DC power supplies Common-mode signal= (v1+v2)/2 Differential signal = v1-v2-+V +V –Inverting input v2Non-inverting input v1positive power supplynegative power supplyv0outputEE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu6Op Amp Terminal Voltages and Currents• All voltages are referenced to a common node.• Current reference directions are intothe op amp.+–V +V ––Vcc++Vcc–+v1–+v2–common node(external to the op amp)i2i1io+vo–ic+ic-4EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu7Model A is differential gain or open loop gain Ideal op amp Common mode gain = 00ioARR→∞→∞=v1v2Ri+–RovoA(v1–v2)i1i2io+_ Circuit Model()121212,2(),0cm docmcmddocmvvvvvvvAv AvSince v A v v A+==−=+=− =EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu8Model and Feedback Negative feedback connecting the output port to the negative input (port 2) Positive feedback connecting the output port to the positive input (port 1)v1v2Ri+–RovoA(v1–v2)i1i2io+_ Circuit Model5EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu9Summing-Point Constraint Check if under negative feedback Small viresult in large vo Output vois connected to the inverting input to reduce vi Resulting in vi=0 Summing-point constraint v1= v2 i1 = i2 =0 Virtual short circuit Not only voltage drop is 0 (which is short circuit), input current is 0 This is different from short circuit, hence called “virtual” short circuit.EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu10Inverting Amplifier Negative feedback Æchecked Use summing-point constraint12 1222122110, 02.()( )ovinin outooinvClosed loop gain Avvv iiUse KCL At Nodevv v viRRRvvRvInput impedance Ri==== ==−−===−==Ideal voltage source – independent of load resistor_+vin+-R2R1RLv1v0v2i26EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu11Non-Inverting Amplifier Ideal voltage amplifier_+vin+-R2R1RLv2v012 1202221121,02.()(0)()ovininoininvC losed loop gain AvvvviiUse KCL At NodevvviRRvRRAvRvInput impedancei==== ==−−==+===→∞2EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu12Voltage Follower_+vin+-RLv2v0210222112 2110()(0)()11oinRRvvviRRvRR RAvR R=→∞−−==+== =+=7EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu13Example 1 Switch is open Switch is closedv1v2vin+-RRLv02R_+i1i2R121 313124502502,0 0()00()1,inininoininvvi ivvivvviiRvvivvvRvARv==→=−=→== →=→=−=→==== →∞i5i3i412 1 32024500, 0 0() ()1,2ininoininvv i ivv vviiRRvvvRARv===→=−−===−=−==− =EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu14Example 2 Design an analog front end circuit to an instrument system Requires to work with 3 full-scale of input signals (by manual switch): V For each input range, the output needs to be V The input resistance is 1MΩ01,010,0100±± ±:: :010±:_+vinR2R1RLv2v02bacvbvav1211111(1 )oinabinabcainabcRvvRv v Switch at cRRv v Switch at bRRRRv v Switch at aRRR=+=+=++=++8EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu15Example 2 (cont’d)21212121110 (1 )1(1) 0.10.1 (1 ) 0.0110 , 90 , 9009in a b cvab abvabc abcaavabc abcabcRRRRMRM ax A Sw itch at cRRR RRRA Sw itch at bRRR R RRRRRRA Sw itch at aRRR R RRRRkRkR kRR=++=Ω==+++== + ∴ =++ ++== + ∴ =++ ++∴=Ω=Ω= Ω=EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu16Summing Amplifier_+v3+-v0R1R2+-+-R3R0v2v19EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu17Difference Amplifier_+v2+-v0R4R1+-R3R2v1EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu18Integrator Want What is the difference between:oinvKvdt=∫R+-CV0+-vin10EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu19Differentiator Want _+vin+-Rv0CEE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu20A DAC can be used to convert the digital representation of an audio signal into an analog voltage that is then used to drive speakers -- so that you can hear it!0 0 1 0 10 0 1 10 1 0 01.520 1 0 10 1 1 00 1 1 11 0 0 02.533.541 0 0 11 0 1 01 0 1 11 1 0 01 1 0 11 1 1 01 1 1 14.555.566.577.5BinarynumberAnalogoutput(volts)0 0 0 00 0 0 10.5MSBLSBS1 closed if LSB =1S2 " if next bit = 1S3 " if " " = 1S4 " if MSB = 14-Bit D/A8V−+V05K80K40K20K10KS1+-S3S2S4−+Application: Digital-to-Analog Conversion“Weighted-adder D/A converter”(Transistors are used as electronic switches)11EE40 Summer 2005: Lecture 9 Instructor: Octavian Florescu21Digital Input 0123456780246810121416Analog Output (V)11111000010000000001Characteristic of 4-Bit DACEE40 Summer 2005: Lecture 9 Instructor: Octavian


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Berkeley ELENG 40 - Lecture Notes

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