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1Lecture 24, Slide 1EECS40, Fall 2003 Prof. KingLecture #24OUTLINE• The common-source (CS) amplifier– load line analysis– DC bias circuit example– small-signal analysis of CS amplifierReference Reading• Howe & Sodini: Chapter 8.1, 8.3 • Hambley (posted online): Chapter 12.2-12.5Lecture 24, Slide 2EECS40, Fall 2003 Prof. KingNotation• Subscript convention (Lecture 2, Slide 11): VDS≡ VD– VS , VGS≡ VG– VS , etc.• Double-subscripts denote DC sources (Lecture 23, Slide 7): VDD , VCC , ISS, etc.• To distinguish between DC and AC components of an electrical quantity, the following convention is used:– DC quantity: upper-case letter with upper-case subscript ID, VDS , etc.– AC quantity: lower-case letter with lower-case subscript id, vds, etc.– Total (DC + AC) quantity: lower-case letter with upper-case subscript iD, vDS, etc.2Lecture 24, Slide 3EECS40, Fall 2003 Prof. KingP-Channel MOSFET Example• In a digital circuit, a p-channel MOSFET in the ON state is typically used to charge a capacitor connected to its drain terminal:– gate voltage VG= 0 V– source voltage VS= VDD(power-supply voltage)– drain voltage VDinitially at 0 V, charging toward VDDCload−≅DDpDSATpDDeqVIVRλ65143VDD0 ViD()22TpDDpDSATVVLWkI −′−=Lecture 24, Slide 4EECS40, Fall 2003 Prof. KingCommon-Source (CS) Amplifier• The input voltage vscauses vGSto vary with time, which in turn causes iDto vary.VDDRD+vOUT= vDS−+vIN= vGS−+–VBIASvs−+iD• The changing voltage drop across RDcauses an amplified (and inverted) version of the input signal to appear at the drain terminal.3Lecture 24, Slide 5EECS40, Fall 2003 Prof. KingLoad-Line Analysis of CS Amplifier• The operating point of the circuit can be determined by finding the intersection of the appropriate MOSFET iDvs. vDScharacteristic and the load line:DSDDDDviRV +=vGS(V)vDS(V)iD(mA)load-line equation:Lecture 24, Slide 6EECS40, Fall 2003 Prof. KingVoltage Transfer Function(1): transistor biased in cutoff region(2): vIN> VT; transistor biased in saturation region(3): transistor biased in saturation region(4): transistor biased in “resistive” or “triode” regionGoal: Operate the amplifier in the high-gain region, so that small changes in vINresult in large changes in vOUTvINvOUT4Lecture 24, Slide 7EECS40, Fall 2003 Prof. KingQuiescent Operating Point• The operating point of the amplifier for zero input signal (vs= 0) is often referred to as the quiescent operating point or Q point.– The Q point should be chosen so that the output voltage is approximately centered between VDDand 0 V.– vsvaries the input voltage around the Q point.Note: The relationship between vOUTand vINis not linear; this results in a distorted output voltage signal. If the input signal amplitude is very small, however, we can have amplification with negligible distortion.Lecture 24, Slide 8EECS40, Fall 2003 Prof. KingBias Circuit ExampleVDDRDR1R25Lecture 24, Slide 9EECS40, Fall 2003 Prof. KingRules for Small-Signal Analysis• A DC supply voltage source acts as a short circuit– Even if AC current flows through the DC voltage source, the AC voltage across it is zero.• A DC supply current source acts as an open circuit– Even if AC voltage is applied across the current source, the AC current through it is zero.Lecture 24, Slide 10EECS40, Fall 2003 Prof. KingSmall-Signal Equivalent Circuitgmvgsro+vgs−RD+vout−R1R2GSSD+vin−()()DominoutvDogsmoutRrgvvARrvgv||||−==−=voltage


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Berkeley ELENG 40 - Lecture Notes

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