Supplementary Reader IV EECS 40 Introduction to Microelectronic Circuits Prof C Chang Hasnain Fall 2006 EE 40 University of California Berkeley Professor Chang Hasnain Table of Contents Chapter 4 4 1 Introduction 1 4 2 Notation 1 4 3 NMOS and PMOS Transistors 2 4 4 N MOSFET Operating Regions 2 4 4 1 Cut off 2 4 4 2 Triode 3 4 4 3 Saturation 3 4 5 Chapter 5 5 1 PMOSFET Operating Regions 4 Simple MOSFET Circuits 5 Analysis for MOSFET Amplifiers 5 5 1 1 DC Analysis Load Line Analysis 5 5 1 2 Small Signal Equivalent Circuit 5 5 1 3 Finding Voltage Gains Input and Output Resistances 6 5 2 i Metal Oxide Semiconductor Field Effect Transistor MOSFET 1 The Inverter 6 5 2 1 Constructing a Logic Gate the Use of Pull Down and Pull Up Networks 7 5 2 2 NMOS Resistor Pull Up 7 5 2 3 The CMOS Inverter 8 5 3 2 Input NAND Gate 10 5 4 2 Input NOR Gate 10 EE 40 University of California Berkeley Prof Chang Hasnain Chapter 4 Metal Oxide Semiconductor Field Effect Transistor MOSFET 4 1 Introduction A transistor is a semiconductor device that uses a small amount of voltage or electrical current to control a larger change in voltage or current Because of its fast response and accuracy it may be used in a wide variety of applications including amplification switching signal modulation and as an oscillator The transistor is the fundamental building block of both digital and analog circuits the circuitry that governs the operation of computers cellular phones and all other modern electronics The field effect transistor FET is a transistor that relies on an electric field to control the shape and hence the conductivity of a channel in a semiconductor material FETs are sometimes used as voltagecontrolled resistors Field effect transistors are devices that are used in amplifiers and logic gates The metal oxide semiconductor field effect transistor MOSFET MOS FET or MOS FET is by far the most common field effect transistor in both digital and analog circuits A MOSFET is a three terminal device that uses the voltage between two terminals to control the current flowing in the third terminal Therefore it can be realized as a voltage controlled current source Some of the basic symbols can be found in the following table Symbol Definition N MOSFET symbols Note that the Drain terminal is on top and the Source terminal on bottom In the first picture the arrow points towards the Gate terminal P MOSFET symbols Note that the Source terminal is on top and the Drain terminal on bottom In the first picture the arrow points away from the Gate terminal Table 1 Symbol Information depicting the symbols that will be used throughout the remainder of this text 4 2 Notation Superposition is a very important concept while analyzing transistors For this reason many types of variables with different subscripts are used Upper case letters with upper case subscripts e g VGS represent results due to DC analysis For the value of a single point it is usually labeled with a subscript Q e g VGSQ Lower case letters with lower case subscripts e g vgs represent results due to AC analysis Finally lower case letters with upper case subscripts e g vGS represent the general or total i e the result achieved by summing the DC and the AC results Fig 1 A device drawing of an NMOS transistor L represents the length of the channel and W the width 1 EE 40 University of California Berkeley Professor Chang Hasnain 4 3 NMOS and PMOS Transistors Figure 1 depicts the structure of an n channel enhancement mode MOSFET also known as an NMOS transistor The substrate or body is doped with acceptors to form p type silicon Two regions on the top surface of the substrate are doped to form n type silicon as indicated by the n regions in the figure Metal is deposited to form contacts to the n regions The two contacts are labeled source S and drain D with another metal to contact the bottom of the substrate labeled body B Between the source and drain a metal contact is deposited on top of a layer of silicon dioxide which in turn is deposited on top of the pSi This contact is labeled gate G The gate metal silicon dioxide and semiconductor underneath form the most important constituents which is the reason that this type of FET is called MOS FET At a first glance the source body and drain body connections are both n p junction And hence we do not expect different characteristics than a simple diode if a voltage is applied to source body or drain body independently However by placing a MOS junction in between very interesting characteristics is achieved Instead of using metal electrode the gate of modern transistors are typically highly doped poly silicon Hence it is best to explain the MOS as n O p junction When a positive gate body voltage is applied the junction is reverse biased Due to the oxide being an insulator no current flows through the gate terminal As the gate body voltage increased above a certain positive value called threshold voltage Vto a thin layer of electrons is formed at the oxide Si interface This layer is called the inversion layer which forms a bridge to conduct electrons from source to drain As the channel is n type with electrons as the conducting carriers this type of MOSFET is called N MOSFET Current can flow into the drain through the channel and out the source if a drain to source voltage vDS is applied You may notice that the terms source and drain seem to be backwards This is because they are the source and drain of carriers which in the case of a NMOS are electrons Varying the gate body voltage changes the inversion layer thickness and hence the resistance of the drain source channel Typically we short the body and source contacts and the gate source voltage vGS is used to control drain source current iDS The device characteristics also depend on device dimensions such as L the length of the channel and W the width of the channel P MOSFET is similar to NMOS except all n doped regions in Fig 1 are p doped and the substrate is ndoped With a negative vGS the MOS junction is reverse biased When vGS becomes smaller than a certain Vto typically negative an inversion layer of holes is formed at the oxide substrate interface which forms the channel to conduct between drainsource The source and body are conventionally shorted as in NMOS The drain source voltage vDS is kept the same sign as vGS which in this case will be negative Thus iDS is also negative Triode Saturation 4 4 N MOSFET Operating Regions Cutoff The I V characteristic for a MOSFET is
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