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EE40 Lecture 10 Josh HugLogistics and Lab ReminderHW ClarificationTo the board…RLC CircuitsLet’s step back a secondApplication to Digital Integrated Circuits (ICs)Digital SignalsCircuit Model for a Logic GateLogic Level TransitionsSequential SwitchingPulse DistortionExamplePowerPoint PresentationParasitic CapacitancesAC InputsSolving Circuits with AC SourcesSlide 18Slide 19PhasorsTwo PathsBasic Idea and Derivation of ImpedancesNew Voltage Source ProblemSlide 24To RecapThe Inverse Superposition TrickInverse SuperpositionReal Part of ExpressionSlide 29Slide 30Slide 31Wait…. That was easier?ImpedanceImpedance Method for Solving AC CircuitsImpedance AnalysisImpedance Analysis ExampleExtra Slides1EE40 Summer 2010HugEE40Lecture 10Josh Hug7/17/20102EE40 Summer 2010HugLogistics and Lab Reminder•If you have not submitted a spec and want to do a custom Project 2, talk to me right after class•HW4 due today at 5•HW5 due Tuesday at 2PM (it will be short, and up by 5 PM today)•As requested, all reading assignments for next week will be posted tonight•We expect you to understand lab concepts. For example, the Schmitt Trigger:–Do you know what they are and what they do?3EE40 Summer 2010HugHW Clarification•There are a bunch of hints on the bspace forums•“Zero state response” and “zero input response” are terms that I haven’t used in lecture, but they’re really easy and they’re in the book–Zero input response: The response you get with f(t)=0 [same as homogeneous solution]–Zero state response: The response you get with y(0)=0 [complete response with initial condition equal to zero]4EE40 Summer 2010HugTo the board…•For LC and RLC circuits5EE40 Summer 2010HugRLC Circuits•They are important, but not so much for digital integrated circuit design•They do play a role in the world of analog circuits, but that’s a bit specialized for us to spend a great deal of time–Usually care more about “frequency response” than the actual shape of the response in time•If you want to learn more about analog circuit design (it is hard and probably awesome), see EE6EE40 Summer 2010HugLet’s step back a second•Earlier this week, I said capacitors are good for–Storing energy–Filtering–Modeling unwanted capacitances in digital circuits•We’ve discussed the first case pretty heavily now, and filtering will come in great detail next week•For now, let’s talk about delay modeling7EE40 Summer 2010HugWhen we perform a sequence of computations using a digital circuit, we switch the input voltages between logic 0 (e.g. 0 Volts) and logic 1 (e.g. 5 Volts).The output of the digital circuit changes between logic 0 and logic 1 as computations are performed.Application to Digital Integrated Circuits (ICs)8EE40 Summer 2010Hug•Every node in a real circuit has capacitance; it’s the charging of these capacitances that limits circuit performance (speed)We compute with pulses. We send beautiful pulses in:But we receive lousy-looking pulses at the output:Capacitor charging effects are responsible!timevoltagetimevoltageDigital Signals9EE40 Summer 2010HugCircuit Model for a Logic Gate•As we’ll discuss in a couple of weeks, electronic building blocks referred to as “logic gates” are used to implement logical functions (NAND, NOR, NOT) in digital ICs–Any logical function can be implemented using these gates.•A logic gate can be modeled as a simple RC circuit:+Vout–RVin(t) +Cswitches between “low” (logic 0) and “high” (logic 1) voltage states10EE40 Summer 2010HugTransition from “0” to “1”(capacitor charging)timeVout0VhighRC0.63VhighVoutVhightimeRC0.37VhighTransition from “1” to “0”(capacitor discharging)(Vhigh is the logic 1 voltage level)Logic Level Transitions RCthighouteVtV/1)(RCthighouteVtV/)(011EE40 Summer 2010HugWhat if we step up the input,wait for the output to respond,then bring the input back down? timeVin00timeVin00VouttimeVin00VoutSequential Switching12EE40 Summer 2010HugThe input voltage pulse width must be long enough; otherwise the output pulse doesn’t make it.(We need to wait for the output to reach a recognizable logic level, before changing the input again.)01234560 1 2 3 4 5TimeVoutPulse width = 0.1RC01234560 1 2 3 4 5TimeVout01234560 5 10 15 20 25TimeVoutPulse Distortion+Vout–RVin(t)C+–Pulse width = 10RCPulse width = RC13EE40 Summer 2010HugVinRVoutCSuppose a voltage pulse of width5 s and height 4 V is applied to theinput of this circuit beginning at t = 0:R = 2.5 kΩC = 1 nF• First, Vout will increase exponentially toward 4 V.• When Vin goes back down, Vout will decrease exponentially back down to 0 V.What is the peak value of Vout?The output increases for 5 s, or 2 time constants. It reaches 1-e-2 or 86% of the final value.0.86 x 4 V = 3.44 V is the peak valueExample = RC = 2.5 s14EE40 Summer 2010Hug00.511.522.533.540 2 4 6 8 10Vout(t) =4-4e-t/2.5s for 0 ≤ t ≤ 5 s3.44e-(t-5s)/2.5s for t > 5 s{15EE40 Summer 2010HugParasitic Capacitances•We’ll discuss these parasitic capacitances in the context of digital integrated circuits right after midterm 216EE40 Summer 2010HugAC Inputs17EE40 Summer 2010HugSolving Circuits with AC Sources•In principle, we can use the MPHS to solve the circuit below:•Will finding the homogeneous solution be difficult?18EE40 Summer 2010HugSolving Circuits with AC Sources•Will finding the particular solution be difficult?19EE40 Summer 2010HugSolving Circuits with AC Sources•Will finding the particular solution be difficult?20EE40 Summer 2010HugPhasors21EE40 Summer 2010HugParticular Solution Connector RouteTwo PathsTrigonometryHellSolving ODEsUsing Impedances and PhasorsSolution TownMPHS Limited22EE40 Summer 2010HugBasic Idea and Derivation of Impedances23EE40 Summer 2010HugNew Voltage Source Problem24EE40 Summer 2010HugNew Voltage Source Problem25EE40 Summer 2010HugTo Recap•AC source made it hard to find particular solution:•So we just replaced the annoying source, giving us:•This gave us the particular solution:26EE40 Summer 2010HugThe Inverse Superposition Trick•Our complex exponential source is actually useful27EE40 Summer 2010HugInverse Superposition•Just find real part and we’re done!28EE40 Summer 2010HugReal Part of Expression•Finding the real part of the expression is easy, it just involves some old school math that you’ve probably forgotten (HW5 will have complex number exercises)29EE40


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Berkeley ELENG 40 - Lecture Notes

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