EE40EE40Final Exam ReviewFinal Exam ReviewProf Nathan CheungProf. Nathan Cheung12/01/2009Practice with past examshttp://hkn.eecs.berkeley.edu/exam/list/?exam_course=EE%2040Slide 1EE40 Fall 2009 Prof. CheungOverview of CourseCircuit components:R C L sourcesCircuit analysis:Laws: Ohm’s, KVL, KCLR, C, L , sourcesI-V characteristicsenergy storage/dissipationÆ Equivalent circuits (series/parallel Thevenin Norton)parallel, Thevenin, Norton)Æ Superposition for linear circuitsÆ Nodal analysisÆMh liÆMesh analysisÆ Phasor I and VFirst-order transient excitation/analysis:Second Order RLC circuitsSlide 2EE40 Fall 2009 Prof. Cheung2Bode PlotsOverview of CourseLogic gates; Combinatorial logic (sum-of-products, Karnaugh maps), sequential logic etcsequential logic etc.Semiconductors Devicespn-diodes (many types) FETs (n-channel, p-channel, CMOS)(,p,)Useful Diode and FET circuits:Useful Diode and FET circuits: Amplifiers: op-amp (negative feedback), rectifiers; wave shaping circuitsSlide 3EE40 Fall 2009 Prof. Cheung3Diode Circuit Analysis by Assumed Diode States•1) Specify Ideal Diode Model or Piecewise-Linear Diode Model ID(A)ID(A)reverse biasforward biasVD(V)reverse biasforward bias•2) Each diode can be ON or OFFVD(V)VDon•3) Circuit containing n diodes will have 2nstates•4) The combination of states that works for ALL di d ( i t t ith KVL d KCL) ill b thSlide 4EE40 Fall 2009 Prof. Cheungdiodes (consistent with KVL and KCL) will be the solutionExample Problem: Perfect Rectifier ModelSketch Vtversus ViSketch Voutversus VinSlide 5EE40 Fall 2009 Prof. CheungSuggested problem: What if there is a 0.6V drop when diodes are on ?Diode with Capacitor Circuit (e.g.Level Shifter) -VC+VINVCVOUT+VIN+CtVIN(min)--V(t)= V(t)+ V(t)VOUT13VOUT (t)= VC(t)+ VIN(t)t2Finds out what happens to VCwhen VINchanges1) Diode =open, VC(t)=0, VOUT (t)= VIN(t)2) Diode =short, VC(t)= -VIN(t) , VOUT(t)=0when VINchangesSlide 6EE40 Fall 2009 Prof. Cheung3) Diode =open, VC(t)= -VIN(min), VOUT(t)= VIN(t)-VIN(min),Example: Diode with RL CircuitSketch i(t)AnswerL/R 0 05Note: i(t) is continuousSlide 7EE40 Fall 2009 Prof. Cheungτ = L/R = 0.05 msecLoad-Line AnalysisWe have a circuit containing a two-terminal non-linear element “NLE”, and some linear components.Then define I and V at the NLE terminals (typically associated signs)First replace the entire linear part of the circuit by its Thevenin equivalent.Then define I and V at the NLE terminals (typically associated signs)ID1V+250KNon-linear element9µA1MD+2V200KSNLDIDVDS+ -1V-Selement-2VSE-Slide 8EE40 Fall 2009 Prof. CheungExample of Load-Line Analysis (con’t)And have this connected to a linearGiven the graphical properties of two terminal non-linear circuit (i.e. the graph of a two terminal device)DIDAnd have this connected to a linear (Thévenin) circuit Whose I-V can also be graphed on the same axes (“load line”)+2V200KSNLDIDVDS+ -on the same axes ( load line )Application of KCL, KVL gives circuit solution-2VSE200KThe solution ID(µA)10IDDNL+-2VThe solution !LESSlide 9EE40 Fall 2009 Prof. CheungVDS(V)12Example : Voltage controlled Attenuator VCand RCDetermines rdatdQ point of diodeSlide 10EE40 Fall 2009 Prof. CheungExample : Voltage Controlled Attenuator The large capacitors and DC bias source are effective shortsSlide 11EE40 Fall 2009 Prof. Cheungfor the ac signal in small-signal circuitsThree-Terminal Parametric GraphsID(µA)103-Terminal DeviceIDDGVGS= 3SVGS+-VGS= 2VGS= 1VDS(V)12Concept of 3-Terminal Parametric Graphs: We set a voltage (or current) at one set ofWe set a voltage (or current) at one set of terminals (here we will apply a fixed VGS, IG=0) and conceptually draw a box around the device ith l t t i l iwith only two terminals emerging so we can again plot the two-terminal characteristic (here IDversus VDS).Slide 12EE40 Fall 2009 Prof. Cheung12But we can do this for a variety of values of VGSwith the result that we get a family of curves.Graphical Solutions for 3-Terminal DevicesIID(µA)10VGS= 3IDG++VD200KVGS= 2VGS= 1-+-V2VSWe can only find a solution for First select VGS (e.g. 2V) and draw IDvs VDS for the 3-Terminal device. VDS(V)12ID(µA)one input (VGS) at a time:Now draw IDvs VDS for the 2V -200KΩ Thevenin source. D(µ)10The solution !The only point on the I vs V plane which obeys KCL and KVL is ID=5µAat VDS=1V.!Slide 13EE40 Fall 2009 Prof. Cheung13VDS(V)12KVL is ID 5µA at VDS 1V.SOLVING MOSFET CIRCUITS: STEPS1) Guess the mode of operation for the transistor. (We will learn how to make educated guesses).2) Write the IDvs. VDSequation for this guess mode of operation.3) Use KVL, KCL, etc. to come up with an equation relating IDand VDSbased on the surrounding linear circuit.4) Solve these equations for IDand VDS.5) Check to see if the values for IDand VDSare possible for the mode you guessed for the transistor. If the values are possible for the mode guessed, stop, problem solved. If the values are Slide 14EE40 Fall 2009 Prof. Cheungg , p, pimpossible, go back to Step 1.CHECKING THE ANSWERSNMOS1) VGS> VT(N)in triode or saturationVGS≤ VT(N)in cutoffTriodeSaturationCut-off•2) VDS< VGS–VT(N)in triode VDS≥ VGS–VT(N)in saturationDS tovV+0GSvTriodeCut-offtoVDS≥GST(N)PMOS1) VGS<VT(P)in triode or PMOSsaturationVGS≥ VT(P)in cutoff2) VDS>VGS–VT(P)in triode TriodeSaturationCut-off)DSGST(P)VDS≤ VGS–VT(P)in saturationDStovV+0GSvtoVSlide 15EE40 Fall 2009 Prof. CheungDStotoExample Problem : MOSFET CircuitSlide 16EE40 Fall 2009 Prof. CheungExample Problem : MOSFET CircuitFind VGSsuch that VDS=2VAnswerGuess Saturation ModeCheck: V(=2V) > V-V(=1 5-05=1V)Slide 17EE40 Fall 2009 Prof. CheungVDS(=2V) > VGS-VT(=1.5-0.5=1V)MOSFET indeed is in saturation modeExample Problem : MOSFET CircuitFind small-signal model parameters=10-5SiemensSlide 18EE40 Fall 2009 Prof. CheungHow do you guess the right mode ?Often, the key is the value of VGS.(We can often find VGSdirectly without solving the whole circuit )(We can often find VGSdirectly without solving the whole circuit.)IVGS≤VT(N)IDVGS=VT(N) + εbbl iIDVGS≤VT(N)definitely cutoffprobably saturationVDSVDSVGS-VT(N) = εSlide 19EE40 Fall 2009 Prof. CheungHow do you guess the right mode ?ti d dtti dWhen VGS>> VTH(N), it’s harder to guess the mode.Itriode modesaturation modeIDVGS-VTH(N)If IDis small, probably triode modeSlide 20EE40 Fall 2009 Prof. CheungVDSEXAMPLE1.5 kΩ1) Since VGS> VTH(N), not in cutoff mode. Guess saturation mode.DID+2) Write transistor IDvs.
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