Slide 1Slide 2Slide 3Slide 4Slide 5Slide 6Slide 7Slide 8Slide 9Slide 10Slide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 17Slide 18Slide 19Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27Slide 28Slide 29Slide 30Slide 31Slide 32Slide 33Slide 34Slide 35Slide 36Slide 37Slide 38Slide 39Slide 40Slide 41Slide 42Slide 43Slide 44Slide 45Slide 46Slide 47Slide 48Slide 49Slide 50Slide 51Slide 52Slide 53Slide 54Slide 55Slide 56Slide 57Slide 58Slide 59Slide 60Slide 61Slide 62Slide 63Slide 64Slide 65Slide 66Slide 67Slide 68ECE 545 - Lecture 13Motorola 68HC11Resources68HC11 E-series Reference Guide and if necessary68HC11 E-series Technical Data 68HC11 Reference Manualall available at http://www.technologicalarts.com/myfiles/links.htmlOptionally:Peter Spasov, Microcontroller Technology, any edition, Prentice-Hall, Chapter 2, Software,and Chapter 7 Clocked Operation(you can borrow this book from the ECE 447 students).Basic Computer SystemCPUMemoryProgram + DataI/O Interface ParallelI/O Device SerialI/O DeviceData BusAddress BusControl BusParallel DataSerial DataMicroprocessor - usually memory off-chip and only basic I/O interface on chipe.g., Intel 8008, 8080, 8086, 80286, PentiumSingle-chip microcomputer - CPU, memory, I/O interface, and simple I/O devices on one LSI chipe.g., Intel 8048, 8051, Motorola 68HC11, 68HC16Microcontroller: I/O oriented single-chip microcomputerMicrocontroler vs. other single-chip microcomputers:• Extended I/O capabilitiessynchronous and asynchronous communication devices,A/D and D/A converters, timers, counters, watchdogs• Interrupt handlingincreased ability to prioritize levels of interrupts and maskindividual interrupts• Instruction setinstructions oriented toward bit manipulation, operations on single bits of memory words or I/O portsEarly microcroprocessorsperformanceintegrationGeneral-purposemicroprocessorsSingle-chip microcomputers- small price- low power consumption- built-in memory- built-in I/O devices- high speed- long word sizevolumesoldx 1 x 10(e.g., Pentium, Alpha, Power PC)(e.g., MC68HC11, 8051)(8080, 6800, Z80)68HC11 OrganizationCPU RAMROMEEPROMTIMERA/DSPISCIPORT A PORT B PORT C PORT D PORT EOrganization of MC68HC11 in the Single-Chip Mode8 8 (4)82468 (4)83 3 2CPU RAMROMEEPROMTIMERA/DSPISCIPORT APORT D PORT EOrganization of MC68HC11 in the Expanded Bus Mode8 (4)2468 (4)83 3 2EXTERNAL RAMEXTERNAL ROMEXTERNAL EPROM EXTERNAL I/OAbbreviationsCPU - Central Processing Unit := ALU (Arithmetic Logic Unit) + ControlRAM - Random Access Memory := Read/Write MemoryROM - Read Only Memory (non-volatile)EPROM - Erasable Programmable ROMEEPROM - Electrically Erasable ROMSCI - Serial Communication Interface (asynchronous serial communication interface)SPI - Serial Peripheral Interface (synchronous serial communication interface)A/D - analog-to-digital converterInternal RegistersX-index registerY-index registerStack PointerProgram CounterCondition Code RegisterRegister structure of MC6811Double Accumulator DAccumulators A and B orIX015IY015SP015PC015CCR07D0157 70 0A BS X H I N Z V CCondition Code RegisterCCR07S X H I N Z V Ccarry / borrowoverflowzeronegativeI-interrupt maskhalf-carry (from bit 3)X-interrupt maskstop disableI/O Ports and other I/O DevicesInput/Output PortsPortInput PinsOutput PinsBidirectional Pins SharedFunctionsPort APort BPort CPort DPort E3–––838–––2–86– TimerHigh Order AddressLow Order Address and Data Bus SCI and SPI A/D ConverterMemory mapped I/O(e.g., Motorola)0MAXI/OControl lines: read/writeSeparate I/O(e.g., Intel)0MAXI/O0maxControl lines: read/write memory/ioMemory map of MC68HC11E1$0000$1000$B600$FFFF$0000$1000$B600$FFFFEXTEXTEXT$0000-$01FF 512 bytes RAM$1000-$103F 64 bytes I/O registers$B600-$B7FF 512 bytes EEPROMSingle-chip mode Expanded bus modeI/O Device Architecture…..Control registersinstructions…..Status registersstatus of the deviceData registers…..I/O deviceaddress1/name1addressN/nameN. . . . .inputs (operands)outputs (results)Input/Output Register Types1. Control registers - hold instructions that regulate the operation of internal I/O devices2. Status registers - indicate the current status of internal I/O devices3. Data registers - hold the input data sent to the I/O device and output data generated by this device4. Data direction registers - control the direction (in or out) of the data flow to/from bidirectional data registersAssembly Language vs. Machine CodeAssembly language vs. machine codeAssembly language[label] mnemonic [operands] LDAA #$4ALDAA $5B, Y Machine code$86 $4A[prebyte] opcode [operands]$18 $A6 $5BSTART CLRA$4FNumber of instructions represented using a single-byte opcodeNumber of instructions represented using a combination prebyte+opcode76236Values of prebytes18, 1A, CDMachine code; move.s11; function that transfer an array of 128 bytes; starting at location $C800 to the memory area; starting at location $D800SECTION .texttransfer:LDX #$C800LDY #$D800loop_beginLDD 0,XSTD 0,YINXINXINYINYCPX #$C880BNE loop_beginRTSENDmove.s11move.lstC:/introl/Examples/E Sep 24 00:41 19102 Page 1 1 ; move.s11 2 ; function that transfer an array of 128 bytes 3 ; starting at location $C800 to the memory area 4 ; starting at location $D800 5 6 SECTION .text 7 8 00000000 transfer: 9 00000000 cec800 LDX #$C800 10 00000003 18ced800 LDY #$D800 11 00000007 loop_begin 12 00000007 ec00 LDD 0,X 13 00000009 18ed00 STD 0,Y 14 0000000c 08 INX 15 0000000d 08 INX 16 0000000e 1808 INY 17 00000010 1808 INY 18 00000012 8cc880 CPX #$C880 19 00000015 26f0 BNE loop_begin 20 00000017 39 RTS 21 22 ENDC:/introl/Examples/E Sep 24 00:41 19102 Page 2 Section synopsis 1 00000018 ( 24) .text C:/introl/Examples/E Sep 24 00:41 19102 Page 3 Symbol table .text 1 00000000 | loop_begin 1 00000007 | transfer E 1 00000000C:/introl/Examples/E Sep 24 00:41 19102 Page 4 Symbol