Carnegie Mellon Introduction to Computer Systems 15 213 18 243 spring 2009 6th Lecture Jan 29th Instructors Gregory Kesden and Markus P schel Carnegie Mellon Last Time Machine Programming Basics History of Intel processors and architectures C assembly machine code Assembly IA32 eax Registers Operands Move what s the l in movl movl 0x4 eax movl eax edx movl eax edx ecx edx ebx esi edi esp ebp Carnegie Mellon Today Complete addressing mode address computation leal Arithmetic operations x86 64 Control Condition codes Conditional branches While loops Carnegie Mellon Complete Memory Addressing Modes Most General Form D Rb Ri S Mem Reg Rb S Reg Ri D D Rb Ri Constant displacement 1 2 or 4 bytes Base register Any of 8 integer registers Index register Any except for esp Unlikely you d use ebp either S Scale 1 2 4 or 8 why these numbers Special Cases Rb Ri D Rb Ri Rb Ri S Mem Reg Rb Reg Ri Mem Reg Rb Reg Ri D Mem Reg Rb S Reg Ri Carnegie Mellon Address Computation Examples edx 0xf000 ecx 0x100 Expression Address Computation Address 0x8 edx 0xf000 0x8 0xf008 edx ecx 0xf000 0x100 0xf100 edx ecx 4 will disappear 0xf000 blackboard 4 0x100 0xf400 0x80 edx 2 2 0xf000 0x80 0x1e080 Carnegie Mellon Address Computation Examples edx 0xf000 ecx 0x100 Expression Address Computation Address 0x8 edx 0xf000 0x8 0xf008 edx ecx 0xf000 0x100 0xf100 edx ecx 4 0xf000 4 0x100 0xf400 0x80 edx 2 2 0xf000 0x80 0x1e080 Carnegie Mellon Address Computation Instruction leal Src Dest Src is address mode expression Set Dest to address denoted by expression Uses Computing addresses without a memory reference E g translation of p x i Computing arithmetic expressions of the form x k y k 1 2 4 or 8 Example Carnegie Mellon Today Complete addressing mode address computation leal Arithmetic operations x86 64 Control Condition codes Conditional branches While loops Carnegie Mellon Some Arithmetic Operations Two Operand Instructions Format addl Src Dest Computation Dest Dest Src subl Src Dest Dest Dest Src imull Src Dest Dest Dest Src sall Src Dest Dest Dest Src Also called shll sarl Src Dest Dest Dest Src Arithmetic shrl Src Dest Dest Dest Src Logical xorl Src Dest Dest Dest Src andl Src Dest Dest Dest Src orl Dest Dest Src Src Dest No distinction between signed and unsigned int why Carnegie Mellon Some Arithmetic Operations One Operand Instructions incl Dest Dest Dest 1 decl Dest Dest Dest 1 negl Dest Dest Dest notl Dest Dest Dest See book for more instructions Carnegie Mellon Using leal for Arithmetic Expressions int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval arith pushl ebp movl esp ebp movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax movl ebp esp popl ebp ret Set Up Body Finish Carnegie Mellon Understanding arith int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax Offset 16 z 12 y 8 x 4 Rtn adr 0 Old ebp eax x edx y ecx x y t1 will edx disappear 3 y edxblackboard 48 y t4 ecx z t1 t2 eax 4 t4 x t5 eax t5 t2 rval Stack ebp Carnegie Mellon Understanding arith int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax Offset 16 z 12 y 8 x 4 Rtn adr 0 Old ebp eax edx ecx edx edx ecx eax eax x y x y t1 3 y 48 y t4 z t1 t2 4 t4 x t5 t5 t2 rval Stack ebp Carnegie Mellon Understanding arith int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax Offset 16 z 12 y 8 x 4 Rtn adr 0 Old ebp eax edx ecx edx edx ecx eax eax x y x y t1 3 y 48 y t4 z t1 t2 4 t4 x t5 t5 t2 rval Stack ebp Carnegie Mellon Understanding arith int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax Offset 16 z 12 y 8 x 4 Rtn adr 0 Old ebp eax edx ecx edx edx ecx eax eax x y x y t1 3 y 48 y t4 z t1 t2 4 t4 x t5 t5 t2 rval Stack ebp Carnegie Mellon Understanding arith int arith int x int y int z int t1 x y int t2 z t1 int t3 x 4 int t4 y 48 int t5 t3 t4 int rval t2 t5 return rval movl 8 ebp eax movl 12 ebp edx leal edx eax ecx leal edx edx 2 edx sall 4 edx addl 16 ebp ecx leal 4 edx eax eax imull ecx eax Offset 16 z 12 y 8 x 4 Rtn adr 0 Old ebp eax edx ecx edx edx ecx eax eax x y x y t1 3 y 48 y t4 z t1 t2 4 t4 x t5 t5 t2 rval Stack ebp Carnegie Mellon Another Example int logical int x int y int t1 x y int t2 t1 17 int mask 1 13 7 int rval t2 mask return rval logical pushl ebp movl esp ebp movl xorl sarl andl 8 ebp eax 12 ebp eax 17 eax 8185 eax Body movl ebp esp popl ebp ret movl xorl sarl andl 8 ebp eax 12 ebp eax 17 eax 8185 eax Set Up eax eax eax eax x x y t1 17 t2 8185 Finish Carnegie Mellon Another Example int logical int x int y int t1 x y int t2 t1 17 int mask 1 13 7 int rval t2 mask return rval logical pushl …
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