Exceptional Control Flow Part I Oct. 17, 2002Control FlowAltering the Control FlowExceptional Control FlowSystem context for exceptionsExceptionsInterrupt VectorsAsynchronous Exceptions (Interrupts)Synchronous ExceptionsTrap ExampleFault Example #1Fault Example #2ProcessesLogical Control FlowsConcurrent ProcessesUser View of Concurrent ProcessesContext SwitchingPrivate Address Spacesfork: Creating new processesFork Example #1Fork Example #2Fork Example #3Fork Example #4Fork Example #5exit: Destroying ProcessZombiesZombie ExampleNonterminating Child Examplewait: Synchronizing with childrenSlide 30Wait ExampleWaitpidWait/Waitpid Example Outputsexec: Running new programsSummarizingSummarizing (cont.)Exceptional Control FlowPart IOct. 17, 2002Exceptional Control FlowPart IOct. 17, 2002TopicsTopicsExceptionsProcess context switchesCreating and destroying processesclass16.ppt15-213“The course that gives CMU its Zip!”– 2 –15-213, F’02Control FlowControl Flow<startup>inst1inst2inst3…instn<shutdown>Computers do Only One ThingComputers do Only One ThingFrom startup to shutdown, a CPU simply reads and executes (interprets) a sequence of instructions, one at a time.This sequence is the system’s physical control flow (or flow of control).Physical control flowTime– 3 –15-213, F’02Altering the Control FlowAltering the Control FlowUp to Now: two mechanisms for changing control flow:Up to Now: two mechanisms for changing control flow:Jumps and branchesCall and return using the stack discipline.Both react to changes in program state.Insufficient for a useful systemInsufficient for a useful systemDifficult for the CPU to react to changes in system state. data arrives from a disk or a network adapter.Instruction divides by zeroUser hits ctl-c at the keyboardSystem timer expiresSystem needs mechanisms for “exceptional control System needs mechanisms for “exceptional control flow”flow”– 4 –15-213, F’02Exceptional Control FlowExceptional Control FlowMechanisms for exceptional control flow exists at all levels of a computer system.Low level MechanismLow level Mechanismexceptions change in control flow in response to a system event (i.e., change in system state)Combination of hardware and OS softwareHigher Level MechanismsHigher Level MechanismsProcess context switchSignalsNonlocal jumps (setjmp/longjmp)Implemented by either:OS software (context switch and signals).C language runtime library: nonlocal jumps.– 5 –15-213, F’02System context for exceptionsSystem context for exceptionsLocal/IO BusLocal/IO BusMemoryMemoryNetworkadapterNetworkadapterIDE diskcontrollerIDE diskcontrollerVideoadapterVideoadapterDisplayDisplayNetworkNetworkProcessorProcessorInterruptcontrollerInterruptcontrollerSCSIcontrollerSCSIcontrollerSCSI busSCSI busSerial port controllerSerial port controllerParallel portcontrollerParallel portcontrollerKeyboardcontrollerKeyboardcontrollerKeyboardKeyboardMouseMousePrinterPrinterModemModemdiskdisk CDROM– 6 –15-213, F’02ExceptionsAn An exceptionexception is a transfer of control to the OS in response is a transfer of control to the OS in response to some to some eventevent (i.e., change in processor state) (i.e., change in processor state)User Process OSexceptionexception processingby exception handlerexception return (optional)event currentnext– 7 –15-213, F’02Interrupt VectorsInterrupt VectorsEach type of event has a unique exception number kIndex into jump table (a.k.a., interrupt vector)Jump table entry k points to a function (exception handler).Handler k is called each time exception k occurs. interruptvector012...n-1code for exception handler 0code for exception handler 0code for exception handler 1code for exception handler 1code forexception handler 2code forexception handler 2code for exception handler n-1code for exception handler n-1...Exception numbers– 8 –15-213, F’02Asynchronous Exceptions (Interrupts)Asynchronous Exceptions (Interrupts)Caused by events external to the processorCaused by events external to the processorIndicated by setting the processor’s interrupt pinhandler returns to “next” instruction.Examples:Examples:I/O interruptshitting ctl-c at the keyboardarrival of a packet from a networkarrival of a data sector from a diskHard reset interrupthitting the reset buttonSoft reset interrupthitting ctl-alt-delete on a PC– 9 –15-213, F’02Synchronous ExceptionsSynchronous ExceptionsCaused by events that occur as a result of executing an Caused by events that occur as a result of executing an instruction:instruction:TrapsIntentionalExamples: system calls, breakpoint traps, special instructionsReturns control to “next” instructionFaultsUnintentional but possibly recoverable Examples: page faults (recoverable), protection faults (unrecoverable).Either re-executes faulting (“current”) instruction or aborts.Abortsunintentional and unrecoverableExamples: parity error, machine check.Aborts current program– 10 –15-213, F’02Trap ExampleTrap ExampleUser Process OSexceptionOpen filereturnintpopOpening a FileOpening a FileUser calls open(filename, options)Function open executes system call instruction intOS must find or create file, get it ready for reading or writingReturns integer file descriptor0804d070 <__libc_open>: . . . 804d082: cd 80 int $0x80 804d084: 5b pop %ebx . . .– 11 –15-213, F’02Fault Example #1Fault Example #1User Process OSpage faultCreate page and load into memoryreturnevent movlMemory ReferenceMemory ReferenceUser writes to memory locationThat portion (page) of user’s memory is currently on diskPage handler must load page into physical memoryReturns to faulting instructionSuccessful on second tryint a[1000];main (){ a[500] = 13;} 80483b7: c7 05 10 9d 04 08 0d movl $0xd,0x8049d10– 12 –15-213, F’02Fault Example #2Fault Example #2User Process OSpage faultDetect invalid addressevent movlMemory ReferenceMemory ReferenceUser writes to memory locationAddress is not validPage handler detects invalid addressSends SIGSEG signal to user processUser process exits with “segmentation fault”int a[1000];main (){ a[5000] = 13;} 80483b7: c7 05 60 e3 04 08 0d movl $0xd,0x804e360Signal process– 13 –15-213, F’02ProcessesProcessesDef: A
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