Machine-Level Programming I:IntroductionSept. 09, 2006Topics Assembly Programmer’s Execution Model Accessing Informationz Registersz Memory Arithmetic operationsclass04.ppt15-213“The course that gives CMU its Zip!”15-213, F’06–2–15-213, F’06IA32 ProcessorsTotally Dominate Computer MarketEvolutionary Design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsoleteComplex Instruction Set Computer (CISC) Many different instructions with many different formatsz But, only small subset encountered with Linux programs Hard to match performance of Reduced Instruction Set Computers (RISC) But, Intel has done just that!–3–15-213, F’06x86 Evolution: Programmer’s View(Abbreviated)x86 Evolution: Programmer’s View(Abbreviated)Name Date Transistors8086 1978 29K 16-bit processor. Basis for IBM PC & DOS Limited to 1MB address space. DOS only gives you 640K386 1985 275K Extended to 32 bits. Added “flat addressing” Capable of running Unix Referred to as “IA32” 32-bit Linux/gcc uses no instructions introduced in later models–4–15-213, F’06x86 Evolution: Programmer’s Viewx86 Evolution: Programmer’s ViewMachine Evolution 486 1989 1.9M Pentium 1993 3.1M Pentium/MMX 1997 4.5M PentiumPro 1995 6.5M Pentium III 1999 8.2M Pentium 4 2001 42MAdded Features Instructions to support multimedia operationszParallel operations on 1, 2, and 4-byte data, both integer & FP Instructions to enable more efficient conditional operationsLinux/GCC Evolution None!–5–15-213, F’06New Species: IA64New Species: IA64Name Date TransistorsItanium 2001 10M Extends to IA64, a 64-bit architecture Radically new instruction set designed for high performance Can run existing IA32 programszOn-board “x86 engine” Joint project with Hewlett-PackardItanium 2 2002 221M Big performance boostItanium 2 Dual-Core 2006 1.7BItanium has not taken off in marketplace Lack of backward compatibility–6–15-213, F’06X86 Evolution: ClonesX86 Evolution: ClonesAdvanced Micro Devices (AMD) HistoricallyzAMD has followed just behind IntelzA little bit slower, a lot cheaper RecentlyzRecruited top circuit designers from Digital Equipment Corp. andother downward trending companieszExploited fact that Intel distracted by IA64zNow are close competitors to Intel Developed x86-64, its own extension to 64 bitsz Started eating into Intel’s high-end server market–7–15-213, F’06Intel’s 64-Bit DilemmaIntel’s 64-Bit DilemmaIntel Attempted Radical Shift from IA32 to IA64 Totally different architecture Executes IA32 code only as legacy Performance disappointingAMD Stepped in with Evolutionary Solution x86-64 (now called “AMD64”)Intel Felt Obligated to Focus on IA64 Hard to admit mistake or that AMD is better2004: Intel Announces EM64T extension to IA32 Extended Memory 64-bit Technology Almost identical to x86-64! Our Saltwater fish machines–8–15-213, F’06Our CoverageOur CoverageIA32 The traditional x86x86-64 The emerging standardPresentation Book has IA32 Handout has x86-64 Lecture will cover bothLabs Lab #2 x86-64 Lab #3 IA32–9–15-213, F’06Assembly Programmer’s ViewAssembly Programmer’s ViewProgrammer-Visible State PC Program Counterz Address of next instructionz Called “EIP” (IA32) or “RIP” (x86-64) Register Filez Heavily used program data Condition Codesz Store status information about most recent arithmetic operationz Used for conditional branchingPCRegistersCPU MemoryObject CodeProgram DataOS DataAddressesDataInstructionsStackConditionCodes Memoryz Byte addressable arrayz Code, user data, (some) OS dataz Includes stack used to support procedures–10–15-213, F’06texttextbinarybinaryCompiler (gcc -S)Assembler (gcc or as)Linker (gcc or ld)C program (p1.c p2.c)Asm program (p1.s p2.s)Object program (p1.o p2.o)Executable program (p)Static libraries (.a)Turning C into Object CodeTurning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o pzUse optimizations (-O)zPut resulting binary in file p–11–15-213, F’06Compiling Into AssemblyC Codeint sum(int x, int y){int t = x+y;return t;}Generated IA32 Assembly_sum:pushl %ebpmovl %esp,%ebpmovl 12(%ebp),%eaxaddl 8(%ebp),%eaxmovl %ebp,%esppopl %ebpretObtain with commandgcc -O -S code.cProduces file code.s–12–15-213, F’06Assembly CharacteristicsAssembly CharacteristicsMinimal Data Types “Integer” data of 1, 2, or 4 bytesz Data valuesz Addresses (untyped pointers) Floating point data of 4, 8, or 10 bytes No aggregate types such as arrays or structuresz Just contiguously allocated bytes in memoryPrimitive Operations Perform arithmetic function on register or memory data Transfer data between memory and registerz Load data from memory into registerz Store register data into memory Transfer controlz Unconditional jumps to/from proceduresz Conditional branches–13–15-213, F’06Code for sum0x401040 <sum>:0x550x890xe50x8b0x450x0c0x030x450x080x890xec0x5d0xc3Object CodeObject CodeAssembler Translates .s into .o Binary encoding of each instruction Nearly-complete image of executable code Missing linkages between code in different filesLinker Resolves references between files Combines with static run-time librariesz E.g., code for malloc, printf Some libraries are dynamically linkedz Linking occurs when program begins execution• Total of 13 bytes• Each instruction 1, 2, or 3 bytes• Starts at address 0x401040–14–15-213, F’06Machine Instruction ExampleMachine Instruction ExampleC Code Add two signed integersAssembly Add 2 4-byte integersz“Long” words in GCC parlancezSame instruction whether signed or unsigned Operands:x:Register %eaxy:Memory M[%ebp+8]t:Register %eax» Return function value in %eaxObject Code 3-byte instruction Stored at address 0x401046int t = x+y;addl 8(%ebp),%eax0x401046: 03 45 08Similar to expression: x += yOrint eax;int *ebp;eax += ebp[2]–15–15-213, F’06Disassembled00401040 <_sum>:0: 55 push %ebp1: 89 e5 mov %esp,%ebp3: 8b 45 0c mov 0xc(%ebp),%eax6: 03 45 08 add 0x8(%ebp),%eax9: 89 ec mov %ebp,%espb: 5d pop %ebpc: c3 ret d: 8d 76 00 lea 0x0(%esi),%esiDisassembling Object CodeDisassembling Object
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