Page 1Exceptional Control FlowPart IMarch 4, 2004Exceptional Control FlowPart IMarch 4, 2004TopicsTopics Exceptions Process context switches Creating and destroying processesclass16.ppt15-213“The course that gives CMU its Zip!”– 2 –15-213, S’04Control FlowControl Flow<startup>inst1inst2inst3…instn<shutdown>Computers do Only One ThingComputers do Only One Thing From startup to shutdown, a CPU simply reads and executes (interprets) a sequence of instructions, one at a time. This sequence is the system’s physical control flow (or flow of control).Physical control flowTime– 3 –15-213, S’04Altering the Control FlowAltering the Control FlowUp to Now: two mechanisms for changing control flow:Up to Now: two mechanisms for changing control flow: Jumps and branches Call and return using the stack discipline.Both react to changes in program state.Insufficient for a useful systemInsufficient for a useful system Difficult for the CPU to react to changes in system state. data arrives from a disk or a network adapter. Instruction divides by zero User hits ctl-c at the keyboard System timer expiresSystem needs mechanisms for “exceptional control System needs mechanisms for “exceptional control flow”flow”– 4 –15-213, S’04Exceptional Control FlowExceptional Control Flow Mechanisms for exceptional control flow exists at all levels of a computer system.Low level MechanismLow level Mechanism exceptions change in control flow in response to a system event (i.e., change in system state) Combination of hardware and OS softwareHigher Level MechanismsHigher Level Mechanisms Process context switch Signals Nonlocal jumps (setjmp/longjmp) Implemented by either: OS software (context switch and signals). C language runtime library: nonlocal jumps.Page 2– 5 –15-213, S’04System context for exceptionsSystem context for exceptionsLocal/IO BusLocal/IO BusMemoryMemoryNetworkadapterNetworkadapterIDE diskcontrollerIDE diskcontrollerVideoadapterVideoadapterDisplayDisplayNetworkNetworkProcessorProcessorInterruptcontrollerInterruptcontrollerSCSIcontrollerSCSIcontrollerSCSI busSCSI busSerial port controllersSerial port controllersParallel portcontrollerParallel portcontrollerTimerTimerKeyboardKeyboardMouseMousePrinterPrinterModemModemdiskdisk CDROMUSB PortsSuper I/O Chip– 6 –15-213, S’04ExceptionsAn An exceptionexceptionis a transfer of control to the OS in response is a transfer of control to the OS in response to some to some eventevent(i.e., change in processor state)(i.e., change in processor state)User Process OSexceptionexception processingby exception handlerexception return (optional)event currentnext– 7 –15-213, S’04Interrupt VectorsInterrupt Vectors Each type of event has a unique exception number k Index into jump table (a.k.a., interrupt vector) Jump table entry k points to a function (exception handler). Handler k is called each time exception k occurs. interruptvector012...n-1code for exception handler 0code for exception handler 0code for exception handler 1code for exception handler 1code forexception handler 2code forexception handler 2code for exception handler n-1code for exception handler n-1...Exception numbers– 8 –15-213, S’04Asynchronous Exceptions (Interrupts)Asynchronous Exceptions (Interrupts)Caused by events external to the processorCaused by events external to the processor Indicated by setting the processor’s interrupt pin handler returns to “next” instruction.Examples:Examples: I/O interrupts hitting ctl-c at the keyboard arrival of a packet from a network arrival of a data sector from a disk Hard reset interrupt hitting the reset button Soft reset interrupt hitting ctl-alt-delete on a PCPage 3– 9 –15-213, S’04Synchronous ExceptionsSynchronous ExceptionsCaused by events that occur as a result of executing an Caused by events that occur as a result of executing an instruction:instruction: Traps Intentional Examples: system calls, breakpoint traps, special instructions Returns control to “next” instruction Faults Unintentional but possibly recoverable Examples: page faults (recoverable), protection faults (unrecoverable), floating point exceptions. Either re-executes faulting (“current”) instruction or aborts. Aborts unintentional and unrecoverable Examples: parity error, machine check. Aborts current program– 10 –15-213, S’04Precise vs. Imprecise FaultsPrecise vs. Imprecise FaultsPrecise Faults: the exception handler knows exactly Precise Faults: the exception handler knows exactly which instruction caused the fault. All prior which instruction caused the fault. All prior instructions have completed and no subsequent instructions have completed and no subsequent instructions had any effect.instructions had any effect.Imprecise Faults: the CPU was working on multiple Imprecise Faults: the CPU was working on multiple instructions concurrently and an ambiguity may instructions concurrently and an ambiguity may exists as to which instruction cause the Fault. For exists as to which instruction cause the Fault. For example, multiple FP instructions were in the pipe example, multiple FP instructions were in the pipe and one caused an exception (Alpha and one caused an exception (Alpha Microprocessors).Microprocessors).– 11 –15-213, S’04Trap ExampleTrap ExampleUser Process OSexceptionOpen filereturnintpopOpening a FileOpening a File User calls open(filename, options) Function open executes system call instruction int OS must find or create file, get it ready for reading or writing Returns integer file descriptor0804d070 <__libc_open>:. . .804d082: cd 80 int $0x80804d084: 5b pop %ebx. . .– 12 –15-213, S’04Fault Example #1Fault Example #1User Process OSpage faultCreate page and load into memoryreturnevent movlMemory ReferenceMemory Reference User writes to memory location That portion (page) of user’s memory is currently on disk Page handler must load page into physical memory Returns to faulting instruction Successful on second tryint a[1000];main (){a[500] = 13;}80483b7: c7 05 10 9d 04 08 0d movl $0xd,0x8049d10Page 4– 13 –15-213, S’04Fault Example #2Fault Example #2User Process OS or HardwareTLB missLook up address translation and store it in a TLB entryreturnevent movlMemory Reference with TLB
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