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CMU CS 15213 - Lecture

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Basic Data Types 15 213 The course that gives CMU its Zip Machine Level Programming IV Data Sept 20 2006 Integral Stored operated on in general registers Signed vs unsigned depends on instructions used Intel byte word double word quad word Structured Data Arrays Structs Unions Buffer overflow 2 class07 ppt Intel Single Double Extended GAS s l t Array Access Basic Principle Basic Principle char short int long int x86 64 Bytes 4 8 10 12 16 C float double long double 15 213 F 06 T A L T A L C unsigned unsigned unsigned unsigned Stored operated on in floating point registers Array Allocation Bytes 1 2 4 8 Floating Point Data Control GAS b w l q Array of data type T and length L Contiguously allocated region of L sizeof T bytes Array of data type T and length L Identifier A can be used as a pointer to array element 0 z Type T char string 12 int val 5 x x 12 1 x 5 2 x 4 x 8 1 3 x 12 x 16 x 20 int val 5 x double a 4 x 4 x 8 x 12 x 16 x 20 Reference Type Value int 3 val int x val 1 int x 4 val 2 int x 8 val 4 x x 8 x 16 x 24 x 32 IA32 char p 3 x x 4 x 8 x 12 x86 64 3 x x 8 x 16 15 213 F 06 x 24 4 val 5 int val 1 int 5 val i int x 4i 15 213 F 06 Array Example Array Accessing Example typedef int zip dig 5 Computation zip dig cmu 1 5 2 1 3 zip dig mit 0 2 1 3 9 zip dig ucb 9 4 7 2 0 zip dig cmu 1 5 2 1 3 16 20 zip dig mit 24 0 36 2 40 zip dig ucb 36 3 52 7 Use memory reference edx eax 4 IA32 Memory Reference Code 0 68 int get digit zip dig z int dig return z dig 56 2 64 9 48 4 60 32 1 44 9 56 28 Register edx contains starting address of array Register eax contains array index Desired digit at 4 eax edx 72 76 edx z eax dig movl edx eax 4 eax z dig Notes Declaration zip dig cmu equivalent to int cmu 5 Example arrays were allocated in successive 20 byte blocks z Not guaranteed to happen in general 15 213 F 06 5 Referencing Examples zip dig cmu 1 16 zip dig mit 5 20 0 36 zip dig ucb 24 2 40 9 56 2 28 44 4 60 3 32 3 48 7 64 Array Loop Example 1 1 36 9 52 2 68 Value mit 3 36 4 3 48 3 mit 5 36 4 5 56 9 mit 1 36 4 1 32 3 cmu 15 16 4 15 76 7 Address Original Source 56 0 72 76 Transformed Version Code Does Not Do Any Bounds Checking Reference 15 213 F 06 6 Guaranteed As generated by GCC Eliminate loop variable i Yes No Convert array code to pointer code No No Express in do while form z No need to test at entrance Out of range behavior implementation dependent z No guaranteed relative allocation of different arrays 15 213 F 06 8 int zd2int zip dig z int i int zi 0 for i 0 i 5 i zi 10 zi z i return zi int zd2int zip dig z int zi 0 int zend z 4 do zi 10 zi z z while z zend return zi 15 213 F 06 Array Loop Implementation IA32 Registers ecx z eax zi ebx zend Computations 10 zi z implemented as z 2 zi 4 zi z increments by 4 9 ecx z xorl eax eax leal 16 ecx ebx L59 leal eax eax 4 edx movl ecx eax addl 4 ecx leal eax edx 2 eax cmpl ebx ecx jle L59 Nested Array Example define PCOUNT 4 zip dig pgh PCOUNT 1 5 2 0 6 1 5 2 1 3 1 5 2 1 7 1 5 2 2 1 int zd2int zip dig z int zi 0 int zend z 4 do zi 10 zi z z while z zend return zi zip dig pgh 4 1 5 2 0 6 1 5 2 1 3 1 5 2 1 7 1 5 2 2 1 76 zi 0 zend z 4 96 116 136 156 Declaration zip dig pgh 4 equivalent to int pgh 4 5 z Variable pgh denotes array of 4 elements 5 zi z z zi z 2 5 zi z zend if goto loop Allocated contiguously z Each element is an array of 5 int s Allocated contiguously 15 213 F 06 Viewing as Multidimensional Array Row Major ordering of all elements guaranteed 15 213 F 06 10 Nested Array Row Access Declaration T A R C A 0 0 2D array of data type T R rows C columns Type T element requires K bytes A 0 C 1 A i is array of C elements Each element of type T Starting address A i C K A R 1 0 A R 1 C 1 int A R C R C K bytes A 0 Arrangement Array Size Row Vectors Row Major Ordering A 0 0 int A R C A A A A 0 0 1 1 0 C 1 0 C 1 A A R 1 R 1 0 C 1 A A i A 0 C 1 A i 0 A i C 4 A R 1 A A i R 1 C 1 0 A R 1 C 1 A R 1 C 4 4 R C Bytes 11 15 213 F 06 12 15 213 F 06 Nested Array Row Access Code int get pgh zip int index return pgh index Array Elements pgh index is array of 5 int s Starting address pgh 20 index A i j is element of type T Address A i C K j K A 0 IA32 Code A 0 0 Computes and returns address Compute as pgh 4 index 4 index A i A 0 C 1 A Address pgh 20 index 4 dig IA32 Code int get pgh digit int index int dig return pgh index dig 15 A R 1 C 1 A R 1 C 4 1 5 2 0 6 1 5 2 1 3 1 5 2 1 7 1 5 2 2 1 76 96 Reference Address movl performs memory reference 4 dig 5 index pgh 4 dig 20 index 15 213 F 06 116 136 Yes pgh 2 5 76 20 2 4 5 136 1 Yes pgh 2 1 76 20 2 4 1 112 3 Yes pgh 4 1 76 20 4 4 1 152 1 Yes pgh 0 19 76 20 0 4 19 152 1 Yes pgh 0 1 76 20 0 4 1 72 No Code does not do any bounds checking Ordering of …


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