Multi core architectures Jernej Barbic 15 213 Spring 2006 May 4 2006 1 Single core computer 2 Single core CPU chip the single core 3 Multi core architectures This lecture is about a new trend in computer architecture Replicate multiple processor cores on a single die Core 1 Multi core CPU chip Core 2 Core 3 Core 4 4 Multi core CPU chip The cores fit on a single processor socket Also called CMP Chip Multi Processor c o r e c o r e c o r e c o r e 1 2 3 4 5 The cores run in parallel thread 1 thread 2 thread 3 thread 4 c o r e c o r e c o r e c o r e 1 2 3 4 6 Within each core threads are time sliced just like on a uniprocessor several threads several threads several threads several threads c o r e c o r e c o r e c o r e 1 2 3 4 7 Interaction with OS OS perceives each core as a separate processor OS scheduler maps threads processes to different cores Most major OS support multi core today 8 Why multi core Difficult to make single core clock frequencies even higher Deeply pipelined circuits heat problems speed of light problems difficult design and verification large design teams necessary server farms need expensive air conditioning Many new applications are multithreaded General trend in computer architecture shift towards more parallelism 9 Instruction level parallelism Parallelism at the machine instruction level The processor can re order pipeline instructions split them into microinstructions do aggressive branch prediction etc Instruction level parallelism enabled rapid increases in processor speeds over the last 15 years 10 Thread level parallelism TLP This is parallelism on a more coarser scale Server can serve each client in a separate thread Web server database server A computer game can do AI graphics and physics in three separate threads Single core superscalar processors cannot fully exploit TLP Multi core architectures are the next step in processor evolution explicitly exploiting TLP 11 General context Multiprocessors Multiprocessor is any computer with several processors SIMD Single instruction multiple data Modern graphics cards MIMD Lemieux cluster Pittsburgh supercomputing center Multiple instructions multiple data 12 Multiprocessor memory types Shared memory In this model there is one large common shared memory for all processors Distributed memory In this model each processor has its own small local memory and its content is not replicated anywhere else 13 Multi core processor is a special kind of a multiprocessor All processors are on the same chip Multi core processors are MIMD Different cores execute different threads Multiple Instructions operating on different parts of memory Multiple Data Multi core is a shared memory multiprocessor All cores share the same memory 14 What applications benefit from multi core Database servers Web servers Web commerce Compilers Multimedia applications Scientific applications CAD CAM In general applications with Thread level parallelism as opposed to instructionlevel parallelism Each can run on its own core 15 More examples Editing a photo while recording a TV show through a digital video recorder Downloading software while running an anti virus program Anything that can be threaded today will map efficiently to multi core BUT some applications difficult to parallelize 16 A technique complementary to multi core Simultaneous multithreading Other execution units wait unused L2 Cache and Control Waiting for the result of a long floating point or integer operation Waiting for data to arrive from memory L1 D Cache D TLB Integer Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Decoder Bus Problem addressed The processor pipeline can get stalled BTB and I TLB Source Intel 17 Simultaneous multithreading SMT Permits multiple independent threads to execute SIMULTANEOUSLY on the SAME core Weaving together multiple threads on the same core Example if one thread is waiting for a floating point operation to complete another thread can use the integer units 18 Without SMT only a single thread can run at any given time L2 Cache and Control L1 D Cache D TLB Integer Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Bus Decoder BTB and I TLB Thread 1 floating point 19 Without SMT only a single thread can run at any given time L2 Cache and Control L1 D Cache D TLB Integer Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Bus Decoder BTB and I TLB Thread 2 integer operation 20 SMT processor both threads can run concurrently L2 Cache and Control L1 D Cache D TLB Integer Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Bus Decoder BTB and I TLB Thread 2 Thread 1 floating point integer operation 21 But Can t simultaneously use the same functional unit L2 Cache and Control L1 D Cache D TLB Integer Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache Bus Decoder BTB and I TLB Thread 1 Thread 2 IMPOSSIBLE uCode ROM This scenario is impossible with SMT on a single core assuming a single 22 integer unit SMT not a true parallel processor Enables better threading e g up to 30 OS and applications perceive each simultaneous thread as a separate virtual processor The chip has only a single copy of each resource Compare to multi core each core has its own copy of resources 23 Multi core threads can run on separate cores Integer L1 D Cache D TLB Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM L2 Cache and Control L2 Cache and Control L1 D Cache D TLB BTB and I TLB Thread 1 Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Decoder Bus Bus Decoder Integer BTB and I TLB Thread 3 24 Multi core threads can run on separate cores Integer L1 D Cache D TLB Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM L2 Cache and Control L2 Cache and Control L1 D Cache D TLB BTB and I TLB Thread 2 Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM Decoder Bus Bus Decoder Integer BTB and I TLB Thread 4 25 Combining Multi core and SMT Cores can be SMT enabled or not The different combinations Single core non SMT standard uniprocessor Single core with SMT Multi core non SMT Multi core with SMT our fish machines The number of SMT threads 2 4 or sometimes 8 simultaneous threads Intel calls them hyper threads 26 SMT Dual core all four threads can run concurrently Integer L1 D Cache D TLB Floating Point Schedulers Uop queues Rename Alloc BTB Trace Cache uCode ROM L2
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