University of TorontoECE532 Digital HardwareModule m05: Adding a User-Designed PeripheralVersion for EDK 8.2.02i as of January 7, 2007New in EDK 7.1iThe Create and Import Peripheral Wizard was introduced in EDK 7.1i to simplify adding user-designed pe-ripherals into an EDK repository or an XPS project. If you wish to add a peripheral that will be connectedto the OPB or PLB bus, then this tool should make it much easier. See the Embedded System Tools ReferenceManual for more information on this wizard.This module was created before the Create and Import Peripheral Wizard was available. It remains avaluable exercise because it develops an understanding of the underlying structure of an XPS project andprovides insight into how to handle a peripheral that might not exactly fit the model of a typical peripheral.In this case, the core to be added also has a connection directly to the processor, not just to the bus. Finally,it provides an example of how to design a peripheral that connects directly to the OPB bus without Xilinx’sIPIF layer and IPIC interface as an intermediary.Goals• Add a user-designed peripheral to a basic MicroBlaze system. You will be provided with a core calledsnoopy that is written in VHDL.• Demonstrate the required structure necessary for interfacing user-designed cores to the Xilinx cores inan XPS project.• Learn about how you would make your own core to attach to the OPB.RequirementsModule m01: Building a MicroBlaze System in XPSIt is suggested that modules m02, m03, and m04 also be completed before proceeding.Preparation• Review the handout outlining the EDK project structure provided in Module m01. We will be focusingon the pcores subdirectory for this module.• If you are unfamiliar with the profiling of code, read the manual page for “gprof”, which is accessibleon most UNIX systems via the “man” command and directly from the FSF.BackgroundTo this point, you have only been adding cores from the existing library. If you cannot find a core with therequired functionality, you will have to add your own.This lab adds a simple core that can be used to profile the code running on a MicroBlaze. This hassimilar functionality to the “gprof” utility for profiling that is included in the GNU toolchain. However, itis much more accurate. You may find it useful for your project.Step-by-step1. Copy your working lab1 project into a new directory called lab5.1University of TorontoECE532 Digital HardwareModule m05: Adding a User-Designed Peripheral2. Delete lab5/code/lab1.c — you don’t need it any more.3. Unzip m05.zip into the directory containing lab5/. This will add a new program (lab5/code/system.c),the custom peripheral (lab5/pcores/snoopy v1 00 a), and some supplemental files.4. Take time to look through the directory structure of the snoopy core. The naming structure is essentialfor XPS to be able to detect a user’s peripheral. All user cores must be located in the pcoressubdirectory or in a globally specified path to a peripheral repository. User cores can be defined usingVerilog, VHDL, or a mixture of the two.Along with the HDL files used to implement the core, the user must also include data files: a .paofile (Peripheral Analyze Order) and an .mpd file (Microprocessor Peripheral Description). The formerlists the order in which files in your design should be synthesized to resolve component architectures.The latter describes the external interface of the core to a system. For more information on these filesand their structure, refer to the Embedded System Tools Guide.Notice that the version numbers in the core name and the version numbers in the data file names differ(e.g., version 1.00.a of the snoopy core includes a data file called snoopyv2 1 0.mpd.) The version inthe core name reflects the core’s version. The version in the data file names reflects the version of thesyntax used to write the data file.The easiest method for including user IP in an EDK project is to follow an example. When you developyour own cores for your project, you can use snoopy as a guide. The cores provided by Xilinx in the$XILINX EDK/hw/XilinxProcessorIPLib/pcores/ directory may also be used as a reference.You are also encouraged to look around through the directories in the EDK installation because thereis a lot of source code available that might help you or guide you with your own designs. Just as youlearn to write good prose by reading good prose, you learn to code well by reading good code. HDL forIP core can be found in the $XILINX EDK/hw/XilinxProcessorIPLib/pcores/ directory and C codefor the drivers can be found in $XILINX EDK/sw/XilinxProcessorIPLib/drivers/. Documentationfor the IP cores and drivers can also be found in these directories.5. The snoopy core is a snooping profiler that is able to profile software running on a soft processor inreal time. The counters calculate the exact number of clock cycles spent executing contiguous addressranges. The user specifies the number of counters and the lower and upper bounds for each counterbefore synthesis. This information can be used by embedded system designers to determine which, ifany, sections of the software should be moved to hardware to achieve the required design specifications.6. Lauch XPS and open your lab5/system.xmp project. Open the IP Catalog tab located in ProjectInformation Area. The snoopy core should appear filed under Project Repository. Add an instance ofthe snoopy core by right clicking the core and selecting Add IP. The core will appear in the list ofSystem Assembly View. Connect it to the slave OPB by clicking the green empty circle associated withthe core. Switch to the Addresses view and place the new snoopy instance somewhere in the memorymap. The core requires 256 bytes of address space to be allocated to it aligned at a 256-byte boundary(don’t forget that the OPB only covers the address space not covered by the ILMB and DLMB — i.e.,0x00010000-0xFFFFFFFF). Feel free to check the parameter settings for the core by double-clickingon it. The default values are fine for now.7. The snoopy core functions by monitoring some trace signals provided by the MicroBlaze. These aredocumented on the MicroBlaze core’s datasheet, accessible by right-clicking on the microblaze 0 entryin the System Assembly View and selecting View PDF Datasheet. Specifically, the PC EX signal of thesnoopy core must be connected to the Trace PC signal provided by the MicroBlaze and the valid instrsignal