ECE532 Design ProjectInitial GoalsFinal DesignProblems and ChangesDesign BlocksDesign ProcessWhat did we learn?ConclusionECE532 Design ProjectPhotoshop Functionalities on FPGAPearl LiuGeorge NgInitial GoalsImplementation Photoshop filters in real-time on FPGAReal time image capture, filtering, and displayXilinx Multimedia BoardXilinx FPGAZBT External MemoryPhotoshop Filter(Custom)32x32 FIFO(Xilinx IP)VGA Controller(Xilinx IP)ZBT Controller(Xilinx IP)ZBT External MemoryVGAInterface(DAC)VGAMonitorFIFO InputController(Custom)FIFOOutputController(Custom)ZBT External MemoryFinal DesignBitmap image stored in ZBTDigital Photoshop filter processes dataControllers manage data transfer between ZBT and display controllerFiltered image data displayed on VGA monitor from FIFOProblems and ChangesThrough research we discovered that digital filtering can be done in time domain eliminating need for FFT and IFFT blocksProving 1D filters work on 2D images inMatlab and simulation testbenches (architectural design)Replaced video capture core data with bitmap image to ensure data reliabilityLack of documentation for example Xilinxcores provided on websiteDesign BlocksCustom: ZBT to FIFO controller, FIFO to display controller, Digital filtersXilinx IP: ZBT controller, VGA Display controller, FIFO (CoreGen)Design ProcessTestbench simulation of individual custom blocks to verify functionalityTestbenching simulation at every design levelSimulate Xilinx IP to understand block behaviorArchitectural design phase to prove design concepts at a high level before beginning hardware implementationWhat did we learn?Importance of simulation for circuit visibilityImportance of prototyping design at high level to prove functionalityFilters can be implemented in time domain without FFT and IFFTHow to use Xilinx example design core and integrated in our systemBitmap image file formatHow to design blur and emboss filtersConclusionSuccessfully implemented 80% of proposed
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