University of TorontoECE532 Digital HardwareLab 5: Adding a User-Designed PeripheralVersion 1.5 8/16/2004This lab can be started during Lab 4 and completed during Lab 5, if neces-sary.Goals• Add a user designed peripheral to a basic MicroBlaze system.• Demonstrate the required structure necessary for interfacing user-designedcores to the Xilinx cores.• Learn about how you would make your own core to attach to the OPB.RequirementsModule 1 (Lab 1) Building a base system. Preferably, do Modules 1-4.Preparation1. Review the handout outlining the EDK project structure provided in Lab1. We will be focusing on the pcores subdirectory for this lab.2. Read the document “Integrating a Verilog design into a MicroBlaze Sys-tem”. Much of the content is also applicable to creating VHDL cores.Pay particular attention to the section about “Adding the design to aMicroBlaze system”.3. If you are unfamiliar with the profiling of code, read the manual page for“gprof”, which is available on the ugsparcs with the “man” command.BackgroundTo this point, you have only been adding cores from the existing library. If youcannot find a core with the required functionality, you will have to add yourown.This lab adds a simple core that can be used to profile the code running ona MicroBlaze. This has similar functionality to the “gprof” utility for profilingthat is available in the GNU tools. However, it is much more accurate. Youmay find it useful for your project.1University of TorontoECE532 Digital HardwareLab 5: Adding a User-Designed PeripheralStep-by-step1. Copy your working lab1 project into a new directory.2. Add a pcores subdirectory to your new project directory.Using an ssh window, login to your ugsparc account. The files you will needfor this lab can be found in pc/courses/532/labs/User Area/lab4.5. Copy:1) system.c to the code directory of your project; 2) the snoopy v1 00 a di-rectory into the pcores directory; and 3) the sst script and example results.txtto the root of the project directory; 4) the OPBInterfaceModule directo-ries to a directory where you can refer to it later. Note: You may find the“cp -r” command useful.3. Take time to look through the directory structure of the snoopy core.The naming structure is essential for XPS to be able to detect a user.speripheral. All user cores must be located in the pcores subdirectory orin a globally specified path to a peripheral repository. User cores canbe defined using either VHDL or Verilog, but the tools do not supportsimulation of mixed designs. Therefore, it may be preferable to write thedesigns in VHDLAlong with the hdl files used to implement the core, the user must alsoinclude data files: a .pao file (Peripheral Analyze Order) and an .mpdfile (Microprocessor Peripheral Description). The .pao file lists the orderin which files in your design should be synthesized to resolve componentarchitectures. The .mpd file describes the external interface of the core toa system. For more information on these files and their structure, go tothe Embedded System Tools Guide.Notice that the version numbers in the core name and the version numbersin the data file names differ. The version in the core name is the core’sversion. The version in the data file names is the version of the syntaxused to write the data file.The easiest method for including user IP into an EDK project, is to fol-low an example. When you develop your own cores for your project,you can use snoopy as a guide. The cores provided by Xilinx in theEDK6.2\hw\\XilinxProcessorIPLib\pcores may also be used as a refer-ence. There is also a document describing how to add user cores to Em-bedded Systems (the User Core Template Reference Guide) but it is meantfor relatively complex cores, providing the user an IP Interface (IPIF) tosimplify user core connections to system buses.4. The snoopy core is a snooping profiler that is able to profile software run-ning on a softcore processor in real time. The counters calculate the exactnumber of clock cycles spent executing contiguous address ranges. Theuser specifies the number of counters and the lower and upper bounds for2University of TorontoECE532 Digital HardwareLab 5: Adding a User-Designed Peripheraleach counter before synthesis. This information can be used by embed-ded system designers to determine which, if any, sections of the softwareshould be moved to hardware to achieve the required design specifications.5. Open the Add/Edit cores menu. The snoopy core should appear in thelist of peripherals you can add to your design. Add the snoopy core andconnect it to the slave opb bus. The core requires 0x100 bytes and a0x100 byte alignment. Since the tools resolve connections to the opb andlmb buses based on the address of a peripheral, we suggest address range0xffffff00 to 0xffffffff to guarantee the peripheral resides on the opb.6. For the snoopy core to work, it must be interfaced with the system clock,and the PC EX and valid instr ports on the Microblaze core. Connect theclock from the snoopy core (OPB Clk) to the system clock. Don.t forget tocheck the net name and the scope under the Ports tab. Unfortunately, thePC EX and valid instr ports on the snoopy core are not visible through theAdd/Edit core interface. Therefore, they will have to be added manuallyto the hardware description.7. Close the XPS GUI. Go to your project directory and open the system.mhsfile. You are going to edit this file by hand. It is important to rememberthat this file contains the project description used by XPS to generateyour MicroBlaze system. Therefore, it is safest to only edit the mhs filewhen XPS is not running.8. You are going to add two lines of code to the MicroBlaze and snoopymodule descriptions. Each module description begins with a BEGIN<module type>. Look for the MicroBlaze core and the snoopy core andadd the following two lines just before both END statements:PORT PC EX = PC EXPORT valid instr = valid instr9. Save and close the mhs file. Reopen XPS and your current project. Goto the Add/Edit cores menu. If you look under the ports tab, you shouldnow see that the valid instr and PC EX ports of the processor have beenconnected to snoopy.10. The core lets you set a reset address for clearing the counters, the numberof counters you want to use (maximum of 16) and the upper and lowerbounds for the instruction addresses. Choose an address that is withinthe address range assigned to the core. (Hints: if you used the