xfft.pdfFast Fourier Transform v3.1Theory of OperationAlgorithmFinite Word Length ConsiderationsArchitecture OptionsPipelined, Streaming I/ORadix-4, Burst I/ORadix-2, Minimum ResourcesCore Symbol and Port DefinitionsGraphical User InterfaceXCO ParametersControl Signals and TimingSynchronous ClearTransform SizeForward/Inverse and Scaling ScheduleOverflowBlock ExponentTiming for Pipelined Streaming I/OTiming for Radix-4 Burst I/O and Radix-2 Minimum ResourcesPerformance and Resource UsageReferencesOrdering InformationRevision Historyxapp529.pdfConnecting Customized IP to the MicroBlaze Soft Processor Using the Fast Simplex Link (FSL) ChannelSummaryIntroductionIntegration of a User IP into a Soft Processor- Based SystemSoft Processors Targeting ASIC Versus FPGAMicroBlaze FSL Interface Versus Customized InstructionGeneral Description of the MicroBlaze Soft ProcessorDetailed Description of the FSL InterfaceDescription of the ApplicationIntegration in HardwareIntegration in SoftwareVerification of the HardwareVerification of the SoftwareReference DesignConclusionRevision HistoryXilinx_FSL_IP.pdfConnecting Customized IP to the MicroBlaze Soft Processor Using the Fast Simplex Link (FSL) ChannelSummaryIntroductionIntegration of a User IP into a Soft Processor- Based SystemSoft Processors Targeting ASIC Versus FPGAMicroBlaze FSL Interface Versus Customized InstructionGeneral Description of the MicroBlaze Soft ProcessorDetailed Description of the FSL InterfaceDescription of the ApplicationIntegration in HardwareIntegration in SoftwareVerification of the HardwareVerification of the SoftwareReference DesignConclusionRevision HistoryECE532 - Digital Hardware Group Project Report Audio-to-MIDI Converter James Shu-Hen Chen 991163904 Sang-Joon Lee 9909083542Table of Contents TOPIC Pages 1 Overview of the Project..................................................................................3 1.1 Objective.................................................................................................3 1.2 Background ............................................................................................3 1.3 Organization ...........................................................................................4 2 Outcome ........................................................................................................6 3 Description of IP Blocks.................................................................................7 3.1 AC'97 Sound Controller ..........................................................................7 3.2 External Memory Controller (Xilinx) ........................................................7 3.3 UART (Xilinx)..........................................................................................7 3.4 Fast Simplex Link (Xilinx) .......................................................................7 3.5 FFT Wrapper ..........................................................................................8 3.5.1 Description............................................................................................8 3.5.2 Theory of Operation..............................................................................8 3.5.3 Limitation ..............................................................................................8 3.5.4 Design Parameters and Signals ...........................................................9 3.5.5 Finite State Machine Description ........................................................11 3.5.6 Simulation......................................................................................13 3.6 Software Sound Processor ...................................................................13 3.6.1 Description ....................................................................................13 3.6.2 Theory of Operation.......................................................................14 3.6.3 Limitations .....................................................................................14 3.6.4 Testing...........................................................................................15 4 Design Tree .................................................................................................16 References .........................................................................................................17 Appendix A: FFT Wrapper Core..........................................................................18 Appendix B: Simulation Results..........................................................................2531 Overview of the Project 1.1 Objective The initial objective of this project is to implement an Audio-to-MIDI (ATM) converter on the Xilinx Vertex-II Multimedia Board. The board would sample audio (music) signals as an input, and outputs MIDI sequences corresponding to the music in real time. 1.2 Background Musical Instrument Digital Interface (MIDI) is a standard in transmitting musical audio information in digital format. The standard is supported by most musical synthesizers, where the musical notes are synthesized and/or manipulated. An ATM Converter adds MIDI compatibility to non-MIDI instruments. It converts audio signals produced by conventional instruments into the MIDI standard, thus allowing digital manipulation of the musical notes. The audio information can be outputted to a MIDI synthesizer. Additionally, the ATM Converter can record music into compact MIDI data files. A good introduction to the MIDI standard can be found at [1] and [2].41.3 Organization AC97 CodecAC97ControllerFSLFSLMicroBlazeProcessorExternal MemoryController (Xilinx IP)ZBTExternalMemoryRS232Serial I/OUARTController(Xilinx)FSLFSLFFTWrapper(custom)FFTxfft v6.1(Xilinx IP)OPB InterfaceMicrophoneI/O from serialportXilinx Virtex-II FPGAXilinx Multimedia Board Figure 1 System Block Diagram AC97 Controller Responsible for capturing audio sample. External Memory Controller Required to access the ZBT memory UART Controller Allows system to output MIDI sequences through the RS232 Port. FFT Core Performs FFT operations for 1024 points.5FFT Wrapper Allows the FFT core to interface with the FSL bus. MicroBlaze Processor Processes FFT data to determine whether or not a note has played or stopped, and sends MIDI sequences to the RS232 port corresponding to these events. Fast Simplex Link (FSL) Allows communication between the MicroBlaze Processor (software) and the various