Toronto ECE 532 - Lab 1 - Building a MicroBlaze System in XPS

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University of TorontoECE532 Digital HardwareLab 1: Building a MicroBlaze System in XPSVersion 1.4 For EDK 6.2i 8/15/2004AcknowledgementThis lab is derived from a Xilinx lab given at the University of Toronto EDKworkshop in November 2003. Many thanks to Xilinx for allowing us to use andmodify their material.Goals• Use Xilinx tools to build and debug a basic MicroBlaze system. This willconsist of a MicroBlaze processor, memory, and a UART.• Understand basic concepts of the Xilinx Embedded Development Kit (EDK),which includes tools such as Xilinx Platform Studio (XPS) and processorIP.• Explore some concepts used when programming in an embedded processorenvironment such as where a program is loaded, how it is loaded, whatgets added to your basic program (runtimes, etc.), how to interact withit.• Use some software debugging tools in an embedded processor environment.RequirementsAccess to EDK 6.2i and the Xilinx Multimedia development board.PreparationYou should have a quick look at the following documents. Links to them areavailable on the course web site:EST Tools Guide, especially the sections on the GNU Compiler Tools andGNU Debugger.sources.redhat.com/insight describes the GUI interface to GDBMicroBlaze Processor Reference Guide The assembly language and in-structions are described here.Training Lecture These are the slides used at the Xilinx workshop. Flippingthrough them may be useful.1University of TorontoECE532 Digital HardwareLab 1: Building a MicroBlaze System in XPSNoteSome of the activity in this lab does not require hardware and can be done later,such as examining various files. If time is running short, it is best to leave thesesteps till later and focus on the steps that actually use the hardware.BackgroundBuilding a system manually for the 1st time can be tedious, but Base SystemBuilder (BSB), a wizard in XPS, can help to build your 1st system quicklyand easily. XPS uses the Xilinx Integrated Software Environment (ISE) toolsto synthesize, place and route the hardware design. GNU tools are providedin the EDK and are used within XPS to build the software for an embeddedMicroBlaze system.SetupIn your kit, you should have the following hardware:• Xilinx Virtex-II Multimedia Board• Xilinx Parallel Cable 4• Straight-thru serial cable (or use a null modem adapter)• Power cableStep-by-stepSetting up the Hardware connections for the MultimediaBoardPlease be very careful when setting up the hardware so as not to break theconnectors. Do not power on the board until a TA has verified yourhardware setup.1. Place the Multimedia board on the table such that you can read the Xilinxinsignia in the bottom right hand corner.2. Attach the flying leads cable to the Parallel Cable IV pod such that thered (JTAG/SERIAL) lead is furthest away from you and the pod is facedso you can read the labels. The leads provide a JTAG connection that isused for downloading FPGA configurations and debugging.3. Connect the cable from the pod to the parallel cable from the computerand the smaller lead to the adaptor dangling from the back of the com-puter. The smaller lead provides power to the pod. The status light onthe pod should now be lit orange.2University of TorontoECE532 Digital HardwareLab 1: Building a MicroBlaze System in XPS4. At the top left hand corner of the gizmo board there are two grey cableslabeled “ CON” and “ D”. Unplug the “ CON” cable and connect it to theserial cable adaptor. Plug the other end of the serial cable into the con-nector located at the top left hand side of the board just below the powerswitch. This will be used for your UART connection (a CONPORT).5. Plug one end of the power supply into the power bar and the other intothe jack located in the top left hand corner (just above the power switch).6. Get a TA to check your connections. You can then turn on the powerswitch (ON and OFF are marked). The LEDs on the board should nowbe on and many are likely flashing.Using XPS Base System Builder7. Create a project directory for your labs in your home directory (W:\in theWindows directory system). Make sure that the path has no spaces!!! Inthis directory, copy the lab1 directory from X:\Courseware\Xilinx 6.2i\User Area8. Start XPS by going to the Courseware folder and selecting the Xilinx 6.2idirectory. Select the Xilinx Embedded Development Kit 6.2 folder anddouble click on the Xilinx Platform Studio icon.9. Select the File menu, select New Project , select Base System Builder.A Create New Project Using Base System Builder Wizard dialog box isdisplayed.10. Browse to the directory named lab1 you copied into your project workarea and select it in the dialog box. Click Open on the dialog box toselect the directory.11. Click OK on the Create New Project dialog box to start building theproject. A Base System Builder - Select Board dialog box is displayed.This may take a few minutes.12. Select Xilinx as the Board Vendor.13. Select the Virtex-II Multimedia FF896 Development Board as the BoardName.14. Select revision 1 for the Board Revision.15. Click Next on the dialog box. A Base System Builder - Select Processordialog box is displayed.16. The MicroBlaze processor should be selected by default because there isnot a PowerPC in this specific FPGA.17. Click Next on the dialog box. A Base System Builder - Configure Processordialog box is displayed.3University of TorontoECE532 Digital HardwareLab 1: Building a MicroBlaze System in XPS18. Select XMD with S/W debug stub and 64K of Local Data and InstructionMemory in the Processor Configuration. This selection uses a ROM mon-itor debug solution, not a true JTAG debug solution. A ROM monitordebug solution assumes that software can execute on the platform to dodebugging. All of the processor memory uses the internal block RAMs ofthe FPGA.19. Click Next on the dialog box. A Base System Builder - Configure IOInterfaces dialog box is displayed. The checkbox indicates that the projectwill be built with the RS-232 interface as specified. The default settingsof the Uart are OK.The Uart peripheral will be used for standard I/O. The standard I/Olibraries delivered in the EDK use the Uart in polled mode, so do notselect the Use Interrupt checkbox.20. Click Next on the dialog box. A Base System Builder - Add InternalPeripherals dialog box is displayed. Internal peripherals include timers,interrupt controllers, and other devices that are typically used within theFPGA. Do not add peripherals at this time.21. Click Next on the


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