2D Graphics Engine: Group Report ECE532: Digital Hardware Hafiz Noordin (990006747) Mohamad Ayad (993069353) Porya Rajabi (992464962) April 2, 20072 Contents 1. Overview ........................................................................................................................ 3 1.1 Objective ................................................................................................................... 3 1.2 Goals......................................................................................................................... 3 1.3 System Overview ....................................................................................................... 3 2. Outcome......................................................................................................................... 6 2.1 Results....................................................................................................................... 6 2.2 Future Work and Improvement................................................................................. 7 3. Description of Blocks .................................................................................................... 7 3.1 Components inside FPGA......................................................................................... 7 3.1.1 Microblaze processor......................................................................................... 8 3.1.2 OPB bus ............................................................................................................. 8 3.1.3 Microblaze Debug Module ................................................................................ 9 3.1.4 OPB External Memory Controller (for ZBT EMC) ........................................... 9 3.1.5 Digital Clock Manager (DCM).......................................................................... 9 3.1.6 Bit Mapped Mode SVGA – Display Controller................................................ 10 3.1.7 2D Graphics Engine ........................................................................................ 11 3.1.7.1 Parameters................................................................................................ 13 3.1.7.2 Register Specification ............................................................................... 13 3.1.7.3 Description of Blocks................................................................................ 14 3.1.7.4 Software API ............................................................................................. 21 3.1.7.5 Software-based Bitmap Mode ................................................................... 23 3.2 Components on Multimedia board.......................................................................... 23 3.3 External devices ...................................................................................................... 23 4. Description of Design Tree......................................................................................... 23 4.1 Directory Structure and Files ................................................................................. 24 4.2 Instructions to synthesize, download and run 2D graphics system ........................ 25 5. References.................................................................................................................... 263 1. Overview 1.1 Objective A graphics system consists of several levels of hardware and software working together to make a computer capable of displaying visual information on a monitor. The primary engine behind the graphics system is the graphics controller, which consists of the custom hardware processor that performs all necessary mathematical operations required to generate pixel data (RGB colour), which is then stored in a region of memory called the frame buffer. A display controller then reads the frame buffer and converts the RGB data to pixels on-screen. A software driver is also necessary to stimulate the hardware and provide an API for developers to create graphics applications. Modern graphics controllers are usually implemented as ASIC’s (Application Specific Integrated Circuits), primarily due to their high performance requirements, especially for intensive 3D applications. The goal of our project was to implement a graphics system on an FPGA. In particular, we designed and implemented the necessary hardware and software components to perform basic 2D operations. 1.2 Goals • Research components and algorithms to perform basic 2D operations • Design Xilinx FPGA-based system incorporating 2D engine, display controller, memory, microprocessor • Design and implement digital circuits for 2D engine operations • Implement software API • Develop software application to demonstrate functionality of system • Desired operations: o Draw pixel o Blit (fill a rectangular region on the screen) o Draw line o Draw character o Bitmap (read raw bitmap information from memory and display on screen) 1.3 System Overview Figure 1 illustrates the System Block Diagram for the 2D graphics system. We used the Multimedia board based on the Virtex-II XC2V2000-FF896 FPGA. The components of the system are divided based on their physical location/implementation: inside the FPGA, on the Multimedia board, and external to the board. The components of our project designed from scratch are shown in green, including: • 2D Graphics Engine: hardware block implemented as an OPB slave (coded in Verilog)4 • Gfx2D API: software IP stored on ZBT RAM 1 via EMC controller (coded in C) • Demo application: software stored on ZBT RAM 1 via EMC controller (coded in C) The components shown in red were part of an IP core that was imported and implemented based on the Bit Mapped Mode SVGA example provided by Xilinx. This module provides an interface to write pixel data to a ZBT RAM, and then transmits the contents of ZBT RAM 2 (frame buffer) to the VGA DAC. The system works by first issuing a command by software using the Gfx2D API. A call to an appropriate C function in the API will issue a command to the 2D Graphics Engine via a register write on the OPB bus. Note that prior to this step, the OPB bus is used to read the instruction in the user’s program code from ZBT RAM 1. The graphics engine then processes the command and generates pixel data based on the desired function. For example, a command to draw a green line from (0,0)