University of TorontoECE532 Digital HardwareLab 2: Adding IP and Device Drivers in XPSVersion 1.3 for EDK 6.2i 8/15/2004AcknowledgementThis lab is derived from a Xilinx lab given at the University of Toronto EDKworkshop in November 2003. Many thanks to Xilinx for allowing us to use andmodify their material.Goals• Use Xilinx tools to add to the basic MicroBlaze system that was builtin Lab1. A primary goal of this lab is to understand more details aboutadding IP into the system without Base System Builder and using devicedrivers.• The General Purpose I/O (GPIO) IP core is used in this lab together withthe associated device driver. The GPIO will be added to the project andused to turn on and off User LED 0 on the board. You will manipulatethe state of the LED from XMD and by using a program.• Get an introduction to the use and structure of driver code.RequirementsModule 1 (Lab 1) on building a base system.Preparation1. The GPIO is a simple parallel I/O port that has similar functions to thePIT used on the GIZMO board. You can have from 1 to 32 input/outputports, which corresponds to the processor having a 32-bit bus. If youuse fewer than 32 ports, the advantage of working in the FPGA synthesisenvironment is that you will only instantiate logic for the number of portsthat you require.If you are on an installed system, find the overview of the OPB GPIOin the Processor IP Reference Guide. The Guide is provided in thedoc directory of the EDK install (O:\Xilinx\EDK6.2i\doc) in the fileproc ip ref guide.pdf. Another way to find all of the documentation isvia the EDK 6.2 Documentation link in the EDK 6.2 folder. In the Guideyou will find a link to the data sheet. The data sheet will also be postedon the course web page. Familiarize yourself with how this block works.Note: The Processor IP Reference Guide can only be completely viewedon an installed system because it contains many links into the installed1University of TorontoECE532 Digital HardwareLab 2: Adding IP and Device Drivers in XPSdirectory tree. It will be available on the course web page, but understandthat many of the hyperlinks will not work.2. In the Processor IP Reference Guide there is also a section called theDevice Driver Programmer Guide. Xilinx provides device drivers so thatthe user may create applications quickly and easily. The Device DriverProgrammer Guide documents many details of the device drivers and soft-ware infrastructure. You should get familiar with this section as you mayeventually need to write your own drivers. In this lab you will be requiredto modify some code to properly use the existing drivers.3. You will start modifying code in this lab. If you are not familiar withany source code control system, you can quickly learn one by doing “manrcsintro” on any unix system. Using such a system is highly recommendedand just good practice. You will need to run the commands from a win-dow connected to one of the ugsparcs. There is an ssh window in theCourseware folder.4. You will need another 15MB of disk space. Limits will be adjusted oncethe final class list is known. You can “clean” the files created in Lab 1 viathe Tools menu to save some space.BackgroundProcessor IP is an integral part of a System-On-Chip (SOC) system. Xilinxprovides a variety of processor IP cores that can quickly and easily be integratedinto a system using XPS.This lab builds from Lab1 and assumes that the user has completed Lab1.A basic understanding of the EDK should have been gained from Lab1.Setup1. Copy the XPS project directory (lab 1 folder) of the previous lab andrename the copy to “lab2”. This will be the working project directory forthis lab.2. Start XPS by selecting Courseware->Xilinx 6.2i->Xilinx Embedded De-velopment Kit 6.2->Xilinx Platform Studio from the Windows desktop.3. Select the File menu, select Open Project, browse to the system.xmp fileof lab2. Click Open to open the project. This is the project you completedin Lab 1.Adding A GPIO With User LED 04. Select the Project menu followed by the Add/Edit Cores submenu. Adialog box is displayed. Examine all the tabs to look at the various aspects2University of TorontoECE532 Digital HardwareLab 2: Adding IP and Device Drivers in XPSof the system that you have already built. Think about how hard it wouldhave been to do this from scratch! Having validated (tested) ready-to-usefunction blocks can significantly improve your design cycle.5. From the Peripherals Tab of the dialog box, scroll to the opb gpio IP corein the box on the right side of the dialog box. Select the opb gpio andclick Add to add it to the system that is displayed on the left side of thedialog box.6. Set the base address of the opb gpio to 0x80010200 to place it at theaddress following the peripheral with the largest high address. The baseaddress is the 1st address that will be decoded by the peripheral on theOn-chip Peripheral Bus (OPB).Set the High Address of the device to 0x800103ff to use the minimumamount of memory space as displayed for the device. The High Addressdetermines the range of addresses starting at the Base Address and con-tinuing thru the High Address.What do you expect the tool to be doing with this information?7. Select the Bus Connections tab of the dialog box. The opbgpio is dis-played as the last row in the table of peripherals on the buses. The tablerows show the peripheral bus interfaces in the design and the table columnsshow the buses to which each peripheral interface may be attached. Click-ing on a table entry will allow the peripheral to be attached to the bus.The entry is either ’M’ or ’s’ with ’M’ being a master on the bus and ’s’being a slave on the bus. Select the opb gpio to be a slave on the mb opb.8. Select the Parameters tab of the dialog box. Choose the opb gpio instancein the drop-down menu, of the dialog box. Select the Open PDF Docbutton on the upper right corner to open the specification for the IP.Review the parameters that can be set and signals that are to be inputand output based on the application.Parameters are implemented in the IP using VHDL generics. This fea-ture of VHDL is a large advantage for IP that must fit many differentapplications.9. Switch back to the Parameters tab in XPS. Select the C GPIO WIDTHparameter and click Add to add it to the parameters that will be changedon the left side of the dialog box. Edit the value in the left side and changeit from 32 to 1 such that there is only 1 bit of general purpose I/O.