xapp286_04.pdfSummaryComponent Video VoltagesThe Associated Digital Video Data Values in Each Video LineVideo Timing Information Embedded in Each Video LineVideo Line and Field TimingReference DesignConclusionReferences:Revision Historyxapp283.pdfSummaryColor Space DefinitionThree Color Space ExamplesRGB Color SpaceY'CbCr Color SpaceConverting from Y'CrCb to R'G'B'Virtex-II Implementation ExamplesVerilog ExamplesImplementation Using Behavioral Verilog (gen_model.*)Design SummaryImplementation Using Block RAM as Look-Up ROM (ram_model.*)Implementation Results Using Embedded Multiplier in Virtex-II DeviceImplementation Using Embedded Multiplier (mult_model.*)Implementation Results Using Embedded Multiplier in Virtex-II DeviceDesign SummaryReference DesignConclusionRevision HistoryECE532H1S Final Report FLASH ACTIVATED STILL IMAGE CAPTURER Team Members: Andrew Michell 990879144 Enrico Baldovino 990884101 Submitted to: Professor Paul Chow April 12, 20042Contents 1.0 Overview...................................................................................................................... 3 2.0 Results and Future Improvements................................................................................ 4 3.0 Block Description ........................................................................................................ 5 3.1 MicroBlaze Processor............................................................................................. 5 3.2 OPB External Memory Controller (EMC) ............................................................. 5 3.3 OPB General Purpose I/O (GPIO) ......................................................................... 6 3.4 Video Processor (vidcap) ....................................................................................... 6 3.5 YCrCb Buffer Viewer ............................................................................................ 8 4.0 Design Tree Description ............................................................................................ 1031.0 Overview This report describes the implementation of a Flash Activated Still Image Capturer, a video processing project proposed by Professor Steve Mann. The basic operation of the overall system is as follows: 1. A camcorder provides a continuous video signal to the Xilinx Multimedia Board through the board’s component video input connection. 2. The ADV7185 video decoder in the board samples the incoming video signal and converts it to YCrCb digital format. 3. A video processing unit, which is enabled through the GPIO, measures the luminance of each incoming video frame and compares it to a luminance threshold (also specified at runtime through the GPIO). 4. A bright camera flash in the video picture causes the frame’s luminance to exceed the threshold value, prompting the video processing unit to store the subsequent frame into external ZBT RAM. 5. The memory where the picture is stored is read and written to a file by an XMD command line script. 6. This file is read by YCrCb Buffer Viewer, a custom viewing application written in Java, which displays the captured picture by sequentially drawing each pixel. The system was built upon the zbt_test design by Lesley Shannon. This design included a MicroBlaze processor and one ZBT RAM bank connected to the OPB bus through an External Memory Controller (EMC). The video input core, vidcap, was connected to the OPB bus in master configuration. This core was enabled by the user at runtime through the GPIO. The original vidcap core, written by Monty Nandra, continuously read YCrCb digital video data from the board’s video decoder and stored it in 32-bit format on the ZBT RAM module. Modifications were made to the vidcap core to enable measurement of the energy of each frame. The core’s operation was changed such that it would only write frames into memory once it has found a frame with an energy measurement that exceeds a certain threshold. A more detailed description of the system’s components can be found in section 3.0 of this document.42.0 Results and Future Improvements The Flash Activated Still Image Capturer successfully measures the brightness of each incoming frame by summing the values of each luminance sample sent by the video decoder. This sum is compared to a threshold level, which can be set by writing the desired value in the GPIO register. The value written must end with the last two bits set high, as these two bits also function as switches, which enable the video capture module to write frames to memory. Frames are not written to memory until after the module senses a frame above the set threshold level. Although the system works and achieves its objectives, there are some drawbacks that can potentially be improved upon: 1) Due to time constraints, we were unable to develop a hardware module that displays the captured frame on a VGA or TV monitor once it is stored in memory. This would eliminate the need to transfer the memory contents to a file and open display it using the YCrCb Buffer Viewer Java application. 2) It was observed that the system is quite dependent on the light conditions where it is being used. In rooms with bright fluorescent lighting, flash frames become less differentiable from regular frames. This problem may be solved by modifying the method by which the energy of each frame is measured such that there is a larger discrepancy between normal frames and those with a flash. 3) Ideally, only one frame should be captured and written to memory. However, we found that when only one frame is written, blank spots appear in the picture. This may be due to the fact that since the video capture module is connected to the OPB as a master, it must be granted permission to write to the RAM. This process might not be happening fast enough for every sample to be written. (Note that this is only a hypothesis; the system should be simulated and tested further in order to find the exact cause of the problem.) Thus, it was necessary to allow the module to write several frames into the same location on the external memory. 4) One might consider modifying the operation of the video processing core so that frames are continually written to memory until a flash frame is found, at which point writing is halted. In this case, the last frame written to memory would be the flash frame, instead of the subsequent frames. This is