University of TorontoECE532 Digital HardwareModule m02: Adding IP and Device Drivers in XPSVersion for EDK 6.3i Jan/06/2005AcknowledgementThis lab is derived from a Xilinx lab given at the University of Toronto EDK workshop in November 2003.Many thanks to Xilinx for allowing us to use and modify their material.Goals• Use Xilinx tools to add to the basic MicroBlaze system that was built in Module 1. A primary goal ofthis lab is to understand more details about adding IP into the system without Base System Builderand using device drivers.• The General Purpose I/O (GPIO) IP core is used in this lab together with the associated device driver.The GPIO will be added to the project and used to turn on and off User LED 0 on the board. Youwill manipulate the state of the LED from XMD and by using a program.• Get an introduction to the use and structure of driver code.RequirementsModule 1 on building a base system.Preparation1. The GPIO is a simple parallel I/O port that has similar functions to the PIT used on the GIZMOboard. You can have from 1 to 32 input/output ports, which corresponds to the processor having a 32-bit bus. If you use fewer than 32 ports, the advantage of working in the FPGA synthesis environmentis that you will only instantiate logic for the number of ports that you require.If you are on an installed system, find the overview of the OPB GPIO in the Processor IP ReferenceGuide. The Guide is provided in the EDK Online Documentation. The location of the documentationwas described in Module 1. In the Guide you will find a link to the data sheet. Familiarize yourselfwith how this block works.2. Also, only available via the documentation tree of an installed system is the Device Driver ProgrammerGuide. Xilinx provides device drivers so that the user may create applications quickly and easily.The Device Driver Programmer Guide documents many details of the device drivers and softwareinfrastructure. You should get familiar with this section as you may eventually need to write your owndrivers. In this lab you will be required to modify some code to properly use the existing drivers.3. You will start modifying code in this lab. If you are not familiar with any source code control system,you can quickly learn one by doing “man rcsintro” on any unix system. Using such a system is highlyrecommended and just good practice. You will need to run the commands from a window connectedto one of the ugsparcs. There is an ssh window in the Courseware folder.4. You will need another 15MB of disk space. Limits will be adjusted once the final class list is known.You can “clean” the files created in Module 1 via the Tools menu to save some space.1University of TorontoECE532 Digital HardwareModule m02: Adding IP and Device Drivers in XPSBackgroundProcessor IP is an integral part of a System-On-Chip (SOC) system. Xilinx provides a variety of processorIP cores that can quickly and easily be integrated into a system using XPS.This module builds from Module 1 and assumes that the user has completed Module 1. A basic under-standing of the EDK tools should have been gained from Module 1.Setup1. Copy the XPS project directory (lab 1 folder) of the previous lab and rename the copy to “lab2”. Thiswill be the working project directory for this lab.2. Start XPS by selecting Courseware->Xilinx 6.3i->Xilinx Embedded Development Kit 6.3->Xilinx Plat-form Studio from the Windows desktop.3. From the initial startup screen, select Open a Recent Project and click OK. Browse to the system.xmpfile of in the lab2 directory. Click Open to open the project. This is the project you completed inModule 1.Adding A GPIO With User LED 04. Select the Project menu followed by the Add/Edit Cores submenu. A dialog box is displayed. Examineall the tabs to look at the various aspects of the system that you have already built. Think abouthow hard it would have been to do this from scratch! Having validated (tested) ready-to-use functionblocks can significantly improve your design cycle.5. From the Peripherals Tab of the dialog box, scroll to the opb gpio IP core in the box on the right sideof the dialog box. Select the opb gpio and click Add to add it to the system that is displayed on theleft side of the dialog box.6. From the Addresses tab, set the base address of the opb gpio to 0x80040000. The base address is the1st address that will be decoded by the peripheral on the On-chip Peripheral Bus (OPB).Set the Size to be 512. This will automatically set the High Address of the device to 0x800401ff, whichuses the minimum amount of memory space as displayed for the device.What do you expect the tool to be doing with this information?7. Select the Bus Connections tab of the dialog box. The opb gpio is displayed as the last row in thetable of peripherals on the buses. The table rows show the peripheral bus interfaces in the design andthe table columns show the buses to which each peripheral interface may be attached. Clicking on atable entry will allow the peripheral to be attached to the bus. The entry is either ’M’ or ’s’ with ’M’being a master on the bus and ’s’ being a slave on the bus. Select the opb gpio to be a slave on themb opb.8. Select the Parameters tab of the dialog box. Choose the opb gpio instance in the drop-down menu, ofthe dialog box. Select the Open PDF Doc button on the upper right corner to open the specificationfor the IP. Review the parameters that can be set and signals that are to be input and output basedon the application.Parameters are implemented in the IP using VHDL generics. This feature of VHDL is a large advantagefor IP that must fit many different applications.9. Switch back to the Parameters tab in XPS. Select the C GPIO WIDTH parameter and click Add toadd it to the parameters that will be changed on the left side of the dialog box. Edit the value in theleft side and change it from 32 to 1 such that there is only 1 bit of general purpose I/O. The generalpurpose I/O will be an output to control an LED on the board.2University of TorontoECE532 Digital HardwareModule m02: Adding IP and Device Drivers in XPS10. Select the Ports tab of the dialog box. In the box on the right side, scroll down to the opb gpio instanceand select the GPIO IO signal of the opb gpio instance. Click Add to cause the signal to appear inthe signal list on the left side of the page.Select the newly added signal on the left side of the page and click the button Make External. Thisshould add the