University of TorontoFaculty of Applied Science and EngineeringTest I – February 2008BA 2139ECE532S – Digital Systems DesignExaminer – Paul Chow1. There are 4 questions and 8pages. Do all questions. The total number of marks is 40. The durationof the test is 50 minutes.2. ALL WORK IS TO BE DONE ON THESE SHEETS! Use the back of the pages if you need morespace. Be sure to indicate clearly if your work continues elsewhere.3. Faculty approved calculators are permitted.4. Closed book. No aids permitted.1 [10]2 [10]3 [10]4 [10]Total [10]Print:First Name:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Last Name:. . . . . . . . . . . . . . . . . . . . . . . . . . . . .Student Number:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Page 1 of 81. Starting with some short answer questions:(a) What is an elf file?[2 marks](b) How do you figure out the amount of memory needed for a C program?[2 marks](c) What does the .mhs file do in the EDK environment?[2 marks](d) Explain how the behaviour of blocking assign statements differ from nonblocking assign state-[2 marks]ments during simulation.(e) What is the Modelsim command to set the signal named iReset to 1?[2 marks]Page 2 of 82. With the XUP-V2Pro board you are asked to prototype a VOIP (voice over Internet Protocol) phone.[10 marks]You will need to attach 12-bit analogue-to-digital (A/D) and digital-to-analogue converters (D/A) tothe external pins that are provided. These pins connect directly to the FPGA. Since this is telephone,you will only need to sample the data at 8 KHz.You will develop your system with the XUP board connected to a host PC that runs all of the toolsyou need.Draw a block diagram of your proposed system with enough detail so that it could be presented at adesign review of your peers where they can provide comments.Your diagram must show all of the necessary components, including the external chips, how thecomponents are connected and how they are implemented (indicate clearly whether a component isin FPGA logic, an external chip, etc.). To help the reviewers understand the design environment, youshould include how the prototype is connected to the PC and how it interacts with the tools.The following is a list of some of the components that you must show in your diagram, but yourcomplete diagram may well include more.• MicroBlaze processor• Ethernet physical layer interface (PHY)• Ethernet controller• instruction and data memory using on-chip memory• instruction and data memory using off-chip memory• XMD stub• gcc• A/D chip• D/A chip• OPB bus• application program (the program you write for the application)• PC• UART• RS232 interface (serial interface) on XUP board• USB/RS232 interface to PC• USB programming cableThere is more space on the next page to answer this question.Page 3 of 8Question 2 continued...Page 4 of 83. The C programming language is commonly used as an embedded programming language. An envi-ronment, such as Linux, takes care of a lot of magic that you now need to understand when workingwith an embedded application. A C program has three main regions that contain the executable code,the uninitialzed variables and the initialized variables.(a) When is the C runtime (typically called crt.s) invoked and what does it do?[3 marks](b) What variables are stored in the uninitialized variables region? An example declaration will help[2 marks]to illustrate your answer.(c) What variables are stored in the initialized variables region? An example declaration will help[2 marks]to illustrate your answer.Page 5 of 8(d) In your embedded MicroBlaze system, you will have a flash memory to store the program and[3 marks]a separate RAM for volatile storage. The memories have been arranged so that the RAM startsat address 0 and the flash starts at some high address that is not contiguous with the RAM, i.e.,the first flash address is not directly after the last RAM address. Assume that the processor canexecute the program directly from the flash memory and that a system reset causes the processorto jump to the first address in flash. What needs to happen when the processor starts executinginstructions after the reset up to the point where the application starts executing at main?Page 6 of 84. The XUP board comes with DDR SDRAM. These memories are 64-bits wide and can run with a133MHz clock. The DDR stands for double-data rate, which means that data is transferred on bothedges of the clock, so the effective bandwidth is 128 bits at 133 MHz.Assume that you are capturing live video at 30 frames per second with a resolution of 1024 by 768.You will feed these frames through a hardware block that will do some processing of the images andthen display the output on a monitor. An entire frame must be captured before the hardware processingcan begin and the frame cannot be displayed until the hardware processing has completed.(a) What is the data rate of the video stream in MegaBytes per second (MB/s)? Assume that you[2 marks]need four bytes per pixel, although you are really only using three, but four just makes the dataalignment easier.(b) Assume that all of the components communicate using a single 32-bit bus running at 100 MHz.[2 marks]Sketch the system that you envision. Show a quick estimate that a single-bus configuration isunlikely to work.Page 7 of 8(c) Sketch a block diagram showing how to build a system using direct connects, such as FSLs[4 marks]to implement the required communication. Assume that you can use a multi-ported memorycontroller for the DDR that can provide up to eight ports.(d) Show that the memory bandwidth available with the DDR memory is more than adequate to[2 marks]support the multiple ports that are required.Page 8 of