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NMT EE 308 - Asynchronous Data Transfer

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EE 308 Apr. 4, 2003Asynchronous Data TransferIn asynchronous data transfer, there is no clock line between the two devicesBoth devices use internal clocks with the same frequencyBoth devices agree on how many data bits are in one data transfer (usually 8,sometimes 9)A device sends data over an TxD line, and receives data over an RxD line– The transmitting device transmits a special bit (the start bit) to indicatethe start of a transfer– The transmitting device sends the requisite number of data bits– The transmitting device ends the data transfer with a special bit (the stopbit)The start bit and the stop bit are used to synchronize the data transferVTIdleStartLB0110101 1IdleStopAsynchronous Serial CommunicationsRxD TxDRxDTxDOne byte requires 10 bit timesS0xD6110101101EE 308 Apr. 4, 2003Asynchronous Data Transfer in the HCS12The HCS12 has two asynchronous serial interfaces, called the SCI0 and SCI1(SCI stands for Serial Communications Interface)The SCI0 is used by D-Bug12 to communicate with the host PCWhen using D-Bug12 you normally cannot independently operate the SCI0(or you will lose your communications link with the host PC)The printf() function sends data to the host PC over the SCI0The SCI0 TxD pin is bit 1 of Port PTSThe SCI0 RxD pin is bit 0 of Port PTSIn asynchronous data transfer, serial data is transmitted by shifting out of atransmit shift register into a receive shift registerTxD Shift Reg RxD Shift RegRxD Shift Reg TxD Shift RegTxDRxD TxDRxDPS1 PS0PS0 PS1SCI0DR (Write) SCI0DR (Read)SCI0DR (Read) SCI0DR (Write)SCI0DR receive and transmit registers are separate registers,distributed into two 8−bit registers: SCI0DRH and SCI0DRL (for SCI0)Overrun error if RxD shift register filled before SCI0DR read2EE 308 Apr. 4, 2003Timing in Asynchronous Data TransfersThe BAUD rate is the number of bits per secondTypical baud rates are 1200, 2400, 4800, 9600, 19,200, and 115,000At 9600 baud the transfer rate is 9600 bits per second, or one bit in 104sWhen not transmitting the TxD line is held highWhen starting a transfer the trasmitting device sends a start bit by bringingTxD low for one bit period (104s at 9600 baud)The receiver knows the transmission is starting when it sees RxD go lowAfter the start bit, the trasmitter sends the requisite number of data bytesThe receiver checks the data three times for each bit. If the data within a bitis different, there is an error. This is called a noise errorThe transmitter ends the transmission with a stop bit, which is a high level onTxD for one bit periodThe receiver checks to make sure that a stop bit is received at the proper timeIf the receiver sees a start bit, but fails to see a stop bit, there is an error. Mostlikely the two clocks are running at different frequencies (generally becausethey are using different baud rates). This is called a framing errorThe transmitter clock and receiver clock will not have exactly the same fre-quencyThe transmission will work as long as the frequencies differ by less than4.5%(4% for 9-bit data)3EE 308 Apr. 4, 2003Timing in Asynchronous Data TransfersRT1RT15RT16RT2RT3RT4RT5RT6RT7RT8RT9RT10RT11RT12RT13RT14RT1RT15RT16RT2RT3RT4RT5RT6RT7RT8RT9RT10RT11RT12RT13RT14RT1RT1RT1RT1Baud Clock = 16 x Baud RateData Bit − Check at RT8,9,10(Majority decides value)(If not all same, noise flag set)If no stop bit detected, Framing Error Flag set(Two of RT3,5,7 must be zero − If not all zero, Noise Flag set)Start BitLSBBaud clocks can differ by 4.5% (4% for 9 data bits) with no errors.Even parity −− the number of ones in data word is evenOdd parity −− the number of ones in data word is oddWhen using parity, transmit 7 data + 1 parity, or 8 data + 1 parityStart Bit − Three 1’s followed by 0’s at RT1,3,5,7ASYNCHRONOUS SERIAL COMMUNICATIONS4EE 308 Apr. 4, 2003SCI RegistersEach SCI uses 8 registers of the HCS12. In the following we will refer toSCI1, and data characters 8 bits long.Two registers are used to set the baud rate (SCI1BDH and SCI1BDL)One of the two control registers (SCI1CR1) is used under normal operation(SCI1CR0 is used for special operation)One of the two status registers (SCI1SR0) is used under normal operation(SCI1SR1 is used for special operation)The transmitter and receiver can be separately enabled in SCI1CR2.Transmitter and receiver interrupts can be separately enabled in SCI1CR1.SCI1SR0 is used to tell when a transmission is complete, and if any errorwas generatedData to be transmitted is sent to SCI1DRLAfter data is received it can be read in SCI1DRL5EE 308 Apr. 4, 2003M ILTWAKETCIE RIE ILIE TE RE RWU SBKTIESBR12 SBR10 SBR9 SBR8SBR5 SBR4 SBR2 SBR1 SBR0SBR11SBR7 SBR6 SBR3PE PTRSRCLOOPSTDRE TC RDRF IDLE OR NF FE0 0 0 0 00 0 0 0 0 0R8 T8R7/T7 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0R6/T6RAF 0 0 0SCI1BDH − 0x00D0SCI1BDL − 0x00D1SCISWAI SCI1CR1 − 0x00D2SCI1CR2 − 0x00D3SCI1SR1 − 0x00D4SCI1DRL − 0x00D7SCI1DRH − 0x00D6 SC0SR2 − 0x00D5PFTXDIRBRK136EE 308 Apr. 4, 2003Baud Rate GenerationThe SCI transmitter and receiver operate independently, although they use thesame baud rate generatorA 13 bit modulus counter derives the baud rate for both the receiver and thetransmitterThe baud rate clock divided by 16 drives the transmitterThe receiver has an acquisition rate of 16 samples per bit time . . . .Receiver TransmitterBaud rategenerator 0 to 819116  ! #"$&%'() *,+.-0/12435Bits Receiver Transmitter Target ErrorSBR[12:0] Clock (Hz) Clock (Hz) Baud rate %39 615,384.6 38,461.5 38,400 0.1678 307,692.3 19,230.7 19,200 0.16156 153,846.1 9,615.3 9,600 0.16312 76,693 4,807.7 4,800 0.167EE 308 Apr. 4, 2003Example program using the SCI1 port#include <iodp256.h>/* Program to transmit data over SCI1 port */main(){/***************************************************************** SCI1 Setup*****************************************************************/SCI1BDL = 0x9C; /* Set BAUD rate to 9,600 (div. by 156) */SCI1BDH = 0x00;SCI1CR1 = 0x00; /* 0 0 0 0 0 0 0 0| | | | | | | || | | | | | | \____ Even Parity| | | | | | \______ Parity Disabled| | | | | \________ Short IDLE line mode (not used)| | | | \__________ Wakeup by IDLE line rec (not used)| | | \____________ 8 data bits| | \______________ Not used (loopback disabled)|


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