NMT EE 308 - What Happens When You Reset the HCS12? (16 pages)

Previewing pages 1, 2, 3, 4, 5 of 16 page document View the full content.
View Full Document

What Happens When You Reset the HCS12?



Previewing pages 1, 2, 3, 4, 5 of actual document.

View the full content.
View Full Document
View Full Document

What Happens When You Reset the HCS12?

97 views

Lecture Notes


Pages:
16
School:
New Mexico Institute of Mining and Technology
Course:
Ee 308 - Microcontrollers
Microcontrollers Documents

Unformatted text preview:

EE 308 Spring 2009 What Happens When You Reset the HCS12 What happens to the HCS12 when you turn on power or push the reset button How does the HCS12 know which instruction to execute first On reset the HCS12 loads the PC with the address located at address 0xFFFE and 0xFFFF Here is what is in the memory of our HCS12 0 1 2 3 4 5 6 7 8 9 A B C D E F FFF0 F6 EC F6 F0 F6 F4 F6 F8 F6 FC F7 00 F7 04 F0 00 On reset or power up the first instruction your HCS12 will execute is the one located at address 0xF000 1 EE 308 Spring 2009 The 9S12 Timer The 9S12 has a 16 bit free running counter timer The 9S12 allows you to slow down the clock which drives the counter You can slow down the clock by dividing the 24 MHz clock by 2 4 8 16 32 64 or 128 You do this by writing to the prescaler bits PR2 0 of the Timer System Control Register 2 TSCR2 Register at address 0x004D 2 7307 ms will be too short if you want to see lights flash You can slow down clock by dividing it before you send it to the 16 bit counter By setting prescaler bits PR2 PR1 PR0 of TSCR2 you can slow down the clock PR2 0 Divide 000 001 010 011 100 101 110 111 1 2 4 8 16 32 64 128 Freq 24 12 6 3 1 5 0 75 0 375 0 1875 Overflow Rate MHz MHz MHz MHz MHz MHz MHz MHz 2 7307 5 4613 10 9227 21 8453 43 6907 87 3813 174 7627 349 5253 ms ms ms ms ms ms ms ms To set up timer so it will overflow every 87 3813 ms bset ldaa staa TSCR1 80 05 TSCR2 TSCR1 TSCR1 0x80 TSCR2 0x05 TIMER OVERFLOW INTERRUPT VCC D Q TOF Read Bit 7 of TFLG2 addr 0x4F 24 MHz Prescaler TEN Bit 7 of TSCR1 addr 0x46 16 Bit Counter Overflow TCNT addr 0x44 R PR 2 0 Bits 2 0 of TSCR2 addr 0x4D TOF Write Bit 7 of TFLG2 addr 0x4F 2 EE 308 Spring 2009 Using the Timer Overflow Flag to implement a delay The HCS12 timer counts at a rate set by the prescaler PR2 0 Divide 000 001 010 011 100 101 110 111 1 2 4 8 16 32 64 128 Clock Freq 24 MHz 12 MHz 6 MHz 3 MHz 1 5 MHz 750 kHz 375 kHz 187 5 kHz Clock Period 0 042 s 0 083 s 0 167 s 0 333 s 0 667 s 1 333 s 2 667 s 5 333 s



View Full Document

Access the best Study Guides, Lecture Notes and Practice Exams

Loading Unlocking...
Login

Join to view What Happens When You Reset the HCS12? and access 3M+ class-specific study document.

or
We will never post anything without your permission.
Don't have an account?
Sign Up

Join to view What Happens When You Reset the HCS12? and access 3M+ class-specific study document.

or

By creating an account you agree to our Privacy Policy and Terms Of Use

Already a member?