EE 308 Spring 2011 • Analog-to-Digital Converters • Huang Sections 12.1-12.2 o Review of MC9S12 PWM subsystem o Introduction to A/D Converters Analog/Digital Converters • An Analog-to-Digital (A/D) converter converts an analog voltage into a digital number • There are a wide variety of methods used for A/D converters Examples are: – Flash (Parallel) – Successive Approximation – Sigma-Delta – Dual Slope Converter • A/D converters are classified according to several characteristics – Resolution (number of bits) — typically 8 bits to 24 bits – Speed (number of samples per second) — several samples/sec to several billion samples/sec – Accuracy — how much error there is in the conversion. • High-resolution converters are usually slower than low-resolution converters • The MC9S12 has two 10-bit successive approximation A/D converters (which can be used in 8-bit mode) • The MC9S12 uses an analog multiplexer to allow eight input pins to connect to any of the A/D converters.EE 308 Spring 2011 Comparator • A comparator is used in many types of A/D converters. • A comparator is the simplest interface from an analog signal to a digital signal • A comparator compares two voltage values on its two inputs • If the voltage on the + input is greater than the voltage on the - input, the output will be a logic high • If the voltage on the + input is less than the voltage on the - input, the output will be a logic low.EE 308 Spring 2011 Flash (Parallel) A/D Converter • A flash A/D converter is the simplest to understand • A flash A/D converter compares an input voltage to a large number of reference voltages • An n-bit flash converter uses 2n-1 comparators • The output of the A/D converter is determined by which of the two reference voltages the input signal is between, • Here is a 3-bit A/D converterEE 308 Spring 2011 Flash (Parallel) A/D Converter • A B-bit Flash A/D converter requires 2B-1 comparators • An 8-bit Flash A/D requires 255 comparators • A 12-bit Flash A/D converter would require 4,095 comparators! – Cannot integrate 4,095 comparators onto an IC • Such A/D are available in IC form up to 8-bit and 10-bit • Flash A/D converters can sample at several billion samples/secEE 308 Spring 2011 A/D Converter Resolution and Quantization • If the voltage input voltage is 3.2516 V, the lowest 5 comparators will be turned on, and the highest 2 comparators will be turned off • The output of the 3-bit flash A/D converter will be 5 (101) • For a 3-bit A/D converter, which has a range from 0 to 5 V, an output of 5 indicates that the input voltage is between 3.125 V and 3.750 V • A 3-bit A/D converter with a 5 V input range has a quantization value of 0.625 V • The quantization value of an A/D converter can be found by ∆∆∆∆V = (VRH − VRL)/2b where VRH is the highest voltage the A/D converter can handle, VRL is the lowest voltage the A/D converter can handle, and b is the number of bits of the A/D converter • The HC12 has a 10-bit A/D converter. The typical voltage range used for the HC12 A/D is VRH = 5 V and VRL = 0 V, so the HC12 has a quantization value of ∆V = (5 V − 0 V)/210 = 4.88 mV • The dynamic range of an A/D converter is given in decibels (dB): DR(dB) = 20 log 2b = 20 b log2 = 6.02b • A 10-bit A/D converter has a dynamic range of DR(dB) = 6.02 × 10 = 60.2 dBEE 308 Spring 2011 A/D Sampling Rate • The rate at which you sample a signal depends on how rapidly the signal is changing • If you sample a signal too slowly, the information about the signal may be inaccurate.EE 308 Spring 2011 • A 1,050 Hz signal sampled at 500 Hz looks like a 50 Hz signal • To get full information about a signal you must sample more than twice the highest frequency in the signal • Practical systems typically use a sampling rate of at least four times the highest frequency in the signalEE 308 Spring 2011 Digital-to-Analog (D/A) Converters • Many A/D converters use a D/A converter internally • A D/A converter converts a digital signal to an analog voltage or current • To understand how most A/D converters work, it is necessary to understand D/A converters • The heart of a D/A converter is an inverting op amp circuit • The output voltage of an inverting op amp circuit is proportional to the input voltage:EE 308 Spring 2011 Digital-to-Analog (D/A) Converters • An inverting op amp can produce an output voltage which is a linear combination of several input voltagesEE 308 Spring 2011 Digital-to-Analog (D/A) Converters • By using input resistors which scale by factors of 2, a summing op amp can produce an output which follows a binary patternEE 308 Spring 2011 Digital-to-Analog (D/A) Converters • By using switches on the input resistors, a summing op amp can produce an output which is a binary number (representing which switches are closed) times a reference voltageEE 308 Spring 2011 Slope A/D Converter • A simple A/D converter can be constructed with a counter and a D/A converter • The counter counts from 0 to 2b-1 • The counter drives the input of the D/A converter • The output of the D/A converter is compared to the input voltage • When the output of the comparator switches logic level, the generated voltage passed the input voltage • By latching the output of the counter at this time, the input voltage can be determined (with the accuracy of the quantization value of the converter) • Problem with Slope A/D converter: Could take 2b clock cycles to test possible values of reference voltagesEE 308 Spring 2011EE 308 Spring 2011 Successive Approximation A/D Converter • A successive approximation (SA) A/D converter uses an intelligent scheme to determine the input voltage • It first tries a voltage half way between VRH and VRL • It determines if the signal is in the lower half or the upper half of the voltage range – If the input is in the upper half of the range, it sets the most significant bit of the output – If the input is in the lower half of the range, it clears the most significant bit of the output • The first clock cycle eliminates half of the possible values • On the next clock cycle, the SA A/D tries a voltage in the middle of the remaining possible values • The second clock cycle allows the SA A/D to determine the
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