EE 308 Spring 2011 • Disassembly of MC9S12 op codes • Decimal, Hexadecimal and Binary Numbers o How to disassemble an MC9S12 instruction sequence o Binary numbers are a code and represent what the programmer intends for the code o Convert binary and hex numbers to unsigned decimal o Convert unsigned decimal to hex o Signed number representation – 2’s complement form o Using the 1’s complement table to find 2’s complements of hex numbers o Overflow and Carry o Addition and subtraction of binary and hex numbers o The condition code register (CCR): N, Z, V and C bits HC12 Instructions 1. Data Transfer and Manipulation Instructions — instructions which move and manipulate data (S12CPUV2 Reference Manual, Sections 5.3, 5.4, and 5.5). • Load and Store — load copy of memory contents into a register; store copy of register contents into memory. LDAA $2000 ; Copy contents of addr $2000 into A STD 0,X ; Copy contents of D to addrs X and X+1 • Transfer — copy contents of one register to another. TBA ; Copy B to A TFR X,Y ; Copy X to Y • Exhange — exchange contents of two registers. XGDX ; Exchange contents of D and X EXG A,B ; Exchange contents of A and B • Move — copy contents of one memory location to another. MOVB $2000,$20A0 ; Copy byte at $2000 to $20A0 MOVW 2,X+,2,Y+ ; Copy two bytes from address held ; in X to address held in Y ; Add 2 to X and Y 2. Arithmetic Instructions — addition, subtraction, multiplication, divison (S12CPUV2 Reference Manual, Sections 5.6, 5.8 and 5.12). ABA ; Add B to A; results in AEE 308 Spring 2011 SUBD $20A1 ; Subtract contents of $20A1 from D INX ; Increment X by 1 MUL ; Multiply A by B; results in D 3. Logic and Bit Instructions — perform logical operations (S12CPUV2 Reference Manual, Sections 5.9, 5.10, 5.11, 5.13 and 5.14). • Logic Instructions ANDA $2000 ; Logical AND of A with contents of $2000 EORB 2,X ; Exclusive OR B with contents of address (X+2) • Clear, Complement and Negate Instructions NEG -2,X ; Negate (2’s comp) contents of address (X-2) CLRA ; Clear Acc A • Bit manipulate and test instructions — work with one bit of a register or memory. BITA #$08 ; Check to see if Bit 3 of A is set BSET $0002,#$18 ; Set bits 3 and 4 of address $002 • Shift and rotate instructions LSLA ; Logical shift left A ASR $1000 ; Arithmetic shift right value at address $1000 4. Compare and test instructions — test contents of a register or memory (to see if zero, negative, etc.), or compare contents of a register to memory (to see if bigger than, etc.) (S12CPUV2 Reference Manual, Section 5.9). TSTA ; (A)-0 -- set flags accordingly CPX #$8000 ; (X) - $8000 -- set flags accordingly 5. Jump and Branch Instructions — Change flow of program (e.g., goto, it-then-else, switch-case) (S12CPUV2 Reference Manual, Sections 5.19, 5.20 and 5.21). JMP L1 ; Start executing code at address label L1 BEQ L2 ; If Z bit set, go to label L2 DBNE X,L3 ; Decrement X; if X not 0 then goto L3 BRCLR $1A,#$80,L4 ; If bit 7 of addr $1A clear, go to label L4 JSR sub1 ; Jump to subroutine sub1 RTS ; Return from subroutine 6. Interrupt Instructions — Initiate or terminate an interrupt call (S12CPUV2 Reference Manual, Section 5.22). • Interrupt instructions SWI ; Initiate software interrupt RTI ; Return from interruptEE 308 Spring 2011 7. Index Manipulation Instructions — Put address into X, Y or SP, manipulate X, Y or SP (S12CPUV2 Reference Manual, Section 5.23). ABX ; Add (B) to (X) LEAX 5,Y ; Put address (Y) + 5 into X 8. Condition Code Instructions — change bits in Condition Code Register (S12CPUV2 Reference Manual, Section 5.26). ANDCC #$f0 ; Clear N, Z, C and V bits of CCR SEV ; Set V bit of CCR 9. Stacking Instructions — push data onto and pull data off of stack (S12CPUV2 Reference Manual, Section 5.24). PSHA ; Push contents of A onto stack PULX ; Pull two top bytes of stack, put into X 10. Stop and Wait Instructions — put MC9S12 into low power mode (S12CPUV2 Reference Manual, Section 5.27). STOP ; Put into lowest power mode WAI ; Put into low power mode until next interrupt 11. Null Instructions NOP ; No operation BRN ; Branch never 12. Instructions we won’t discuss or use — BCD arithmetic, fuzzy logic, minimum and maximum, multiply-accumulate, table interpolation (S12CPUV2 Reference Manual, Sections 5.7, 5.16, 5.17, and 5.18).EE 308 Spring 2011 Disassembly of an HC12 Program • It is sometimes useful to be able to convert HC12 op codes into mnemonics. For example, consider the hex code: ADDR DATA --------------------------------------------------------- 1000 C6 05 CE 20 00 E6 01 18 06 04 35 EE 3F • To determine the instructions, use Table A-2 of the HCS12 Core Users Guide. – If the first byte of the instruction is anything other than $18, use Sheet 1 of Table A.2. From this table, determine the number of bytes of the instruction and the addressing mode. For example, $C6 is a two-byte instruction, the mnemonic is LDAB, and it uses the IMM addressing mode. Thus, the two bytes C6 05 is the op code for the instruction LDAB #$05. – If the first byte is $18, use Sheet 2 of Table A.2, and do the same thing. For example, 18 06 is a two byte instruction, the mnemonic is ABA, and it uses the INH addressing mode, so there is no operand. Thus, the two bytes 18 06 is the op code for the instruction ABA. – Indexed addressing mode is fairly complicated to disassemble. You need to use Table A.3 to determine the operand. For example, the op code $E6 indicates LDAB indexed, and may use two to four bytes (one to three bytes in addition to the op code). The postbyte 01 indicates that the operand is 0,1, which is 5-bit constant offset, which takes only one additional byte. All 5-bit constant offset, pre and post increment and decrement, and register offset instructions use one additional byte. All 9-bit constant offset instructions use two additional bytes, with the second byte holding 8 bits of the 9 bit offset. (The 9th bit is a direction bit, which is held in the first postbyte.) All 16-bit constant offset instructions use three postbytes, with the 2nd and 3rd holding the 16-bit unsigned offset. – Transfer (TFR) and exchange (EXG) instructions all have the op code $B7. Use Table A.5 to determine whether it is TFR or an EXG, and to determine which registers are being
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