University of Toronto ECE532 Digital Hardware Module m02 Adding IP and Device Drivers in XPS Version for EDK 6 3i Jan 06 2005 Acknowledgement This lab is derived from a Xilinx lab given at the University of Toronto EDK workshop in November 2003 Many thanks to Xilinx for allowing us to use and modify their material Goals Use Xilinx tools to add to the basic MicroBlaze system that was built in Module 1 A primary goal of this lab is to understand more details about adding IP into the system without Base System Builder and using device drivers The General Purpose I O GPIO IP core is used in this lab together with the associated device driver The GPIO will be added to the project and used to turn on and off User LED 0 on the board You will manipulate the state of the LED from XMD and by using a program Get an introduction to the use and structure of driver code Requirements Module 1 on building a base system Preparation 1 The GPIO is a simple parallel I O port that has similar functions to the PIT used on the GIZMO board You can have from 1 to 32 input output ports which corresponds to the processor having a 32bit bus If you use fewer than 32 ports the advantage of working in the FPGA synthesis environment is that you will only instantiate logic for the number of ports that you require If you are on an installed system find the overview of the OPB GPIO in the Processor IP Reference Guide The Guide is provided in the EDK Online Documentation The location of the documentation was described in Module 1 In the Guide you will find a link to the data sheet Familiarize yourself with how this block works 2 Also only available via the documentation tree of an installed system is the Device Driver Programmer Guide Xilinx provides device drivers so that the user may create applications quickly and easily The Device Driver Programmer Guide documents many details of the device drivers and software infrastructure You should get familiar with this section as you may eventually need to write your own drivers In this lab you will be required to modify some code to properly use the existing drivers 3 You will start modifying code in this lab If you are not familiar with any source code control system you can quickly learn one by doing man rcsintro on any unix system Using such a system is highly recommended and just good practice You will need to run the commands from a window connected to one of the ugsparcs There is an ssh window in the Courseware folder 4 You will need another 15MB of disk space Limits will be adjusted once the final class list is known You can clean the files created in Module 1 via the Tools menu to save some space 1 University of Toronto ECE532 Digital Hardware Module m02 Adding IP and Device Drivers in XPS Background Processor IP is an integral part of a System On Chip SOC system Xilinx provides a variety of processor IP cores that can quickly and easily be integrated into a system using XPS This module builds from Module 1 and assumes that the user has completed Module 1 A basic understanding of the EDK tools should have been gained from Module 1 Setup 1 Copy the XPS project directory lab 1 folder of the previous lab and rename the copy to lab2 This will be the working project directory for this lab 2 Start XPS by selecting Courseware Xilinx 6 3i Xilinx Embedded Development Kit 6 3 Xilinx Platform Studio from the Windows desktop 3 From the initial startup screen select Open a Recent Project and click OK Browse to the system xmp file of in the lab2 directory Click Open to open the project This is the project you completed in Module 1 Adding A GPIO With User LED 0 4 Select the Project menu followed by the Add Edit Cores submenu A dialog box is displayed Examine all the tabs to look at the various aspects of the system that you have already built Think about how hard it would have been to do this from scratch Having validated tested ready to use function blocks can significantly improve your design cycle 5 From the Peripherals Tab of the dialog box scroll to the opb gpio IP core in the box on the right side of the dialog box Select the opb gpio and click Add to add it to the system that is displayed on the left side of the dialog box 6 From the Addresses tab set the base address of the opb gpio to 0x80040000 The base address is the 1st address that will be decoded by the peripheral on the On chip Peripheral Bus OPB Set the Size to be 512 This will automatically set the High Address of the device to 0x800401ff which uses the minimum amount of memory space as displayed for the device What do you expect the tool to be doing with this information 7 Select the Bus Connections tab of the dialog box The opb gpio is displayed as the last row in the table of peripherals on the buses The table rows show the peripheral bus interfaces in the design and the table columns show the buses to which each peripheral interface may be attached Clicking on a table entry will allow the peripheral to be attached to the bus The entry is either M or s with M being a master on the bus and s being a slave on the bus Select the opb gpio to be a slave on the mb opb 8 Select the Parameters tab of the dialog box Choose the opb gpio instance in the drop down menu of the dialog box Select the Open PDF Doc button on the upper right corner to open the specification for the IP Review the parameters that can be set and signals that are to be input and output based on the application Parameters are implemented in the IP using VHDL generics This feature of VHDL is a large advantage for IP that must fit many different applications 9 Switch back to the Parameters tab in XPS Select the C GPIO WIDTH parameter and click Add to add it to the parameters that will be changed on the left side of the dialog box Edit the value in the left side and change it from 32 to 1 such that there is only 1 bit of general purpose I O The general purpose I O will be an output to control an LED on the board 2 University of Toronto ECE532 Digital Hardware Module m02 Adding IP and Device Drivers in XPS 10 Select the Ports tab of the dialog box In the box on the right side scroll down to the opb gpio instance and select the GPIO IO signal of the opb gpio instance Click Add to cause the signal to appear in the signal list on the left side of the page Select the newly added …